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From: Zhenguo Yao <yaozhenguo1@gmail.com>
To: srinivas.pandruvada@linux.intel.com, lenb@kernel.org
Cc: rafael@kernel.org, viresh.kumar@linaro.org,
	linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
	yaozhenguo@jd.com, Zhenguo Yao <yaozhenguo1@gmail.com>
Subject: [PATCH] cpufreq: intel_pstate: Add Emerald Rapids support in no-HWP mode
Date: Wed, 13 Dec 2023 18:28:08 +0800	[thread overview]
Message-ID: <20231213102808.94695-1-yaozhenguo1@gmail.com> (raw)

Users may disable HWP in firmware, in which case intel_pstate wouldn't load
unless the CPU model is explicitly supported.

See also the following past commits:

commit df51f287b5de ("cpufreq: intel_pstate: Add Sapphire Rapids support
in no-HWP mode")
commit d8de7a44e11f ("cpufreq: intel_pstate: Add Skylake servers support")
commit 706c5328851d ("cpufreq: intel_pstate: Add Cometlake support in
no-HWP mode")
commit fbdc21e9b038 ("cpufreq: intel_pstate: Add Icelake servers support in
no-HWP mode")
commit 71bb5c82aaae ("cpufreq: intel_pstate: Add Tigerlake support in
no-HWP mode")

Signed-off-by: Zhenguo Yao <yaozhenguo1@gmail.com>
---
 drivers/cpufreq/intel_pstate.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index a534a1f7f1ee..39e0a2cf7236 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -2406,6 +2406,7 @@ static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
 	X86_MATCH(ICELAKE_X,		core_funcs),
 	X86_MATCH(TIGERLAKE,		core_funcs),
 	X86_MATCH(SAPPHIRERAPIDS_X,	core_funcs),
+	X86_MATCH(EMERALDRAPIDS_X,      core_funcs),
 	{}
 };
 MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
-- 
2.39.3


             reply	other threads:[~2023-12-13 10:28 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-13 10:28 Zhenguo Yao [this message]
2023-12-19 20:22 ` Rafael J. Wysocki
2023-12-19 20:33   ` srinivas pandruvada
2023-12-19 20:39     ` Rafael J. Wysocki

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