arch/x86/lib/usercopy_64.c:89: warning: Function parameter or member 'addr' not described in 'clean_cache_range'

[kernel test robot <lkp@intel.com>]

Hi Dan,

FYI, the error/warning still remains.

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   5bd7ef53ffe5ca580e93e74eb8c81ed191ddc4bd
commit: 0aed55af88345b5d673240f90e671d79662fb01e x86, uaccess: introduce copy_from_iter_flushcache for pmem / cache-bypass operations
date:   7 years ago
config: x86_64-allnoconfig (https://download.01.org/0day-ci/archive/20231214/202312141239.7gLVWsfu-lkp@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231214/202312141239.7gLVWsfu-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202312141239.7gLVWsfu-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> arch/x86/lib/usercopy_64.c:89: warning: Function parameter or member 'addr' not described in 'clean_cache_range'
>> arch/x86/lib/usercopy_64.c:89: warning: Excess function parameter 'vaddr' description in 'clean_cache_range'


vim +89 arch/x86/lib/usercopy_64.c

    77	
    78	#ifdef CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE
    79	/**
    80	 * clean_cache_range - write back a cache range with CLWB
    81	 * @vaddr:	virtual start address
    82	 * @size:	number of bytes to write back
    83	 *
    84	 * Write back a cache range using the CLWB (cache line write back)
    85	 * instruction. Note that @size is internally rounded up to be cache
    86	 * line size aligned.
    87	 */
    88	static void clean_cache_range(void *addr, size_t size)
  > 89	{
    90		u16 x86_clflush_size = boot_cpu_data.x86_clflush_size;
    91		unsigned long clflush_mask = x86_clflush_size - 1;
    92		void *vend = addr + size;
    93		void *p;
    94	
    95		for (p = (void *)((unsigned long)addr & ~clflush_mask);
    96		     p < vend; p += x86_clflush_size)
    97			clwb(p);
    98	}
    99	

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