From: Yan Zhao <yan.y.zhao@intel.com>
To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org
Cc: pbonzini@redhat.com, seanjc@google.com, olvaffe@gmail.com,
kevin.tian@intel.com, zhiyuan.lv@intel.com,
zhenyu.z.wang@intel.com, yongwei.ma@intel.com,
vkuznets@redhat.com, wanpengli@tencent.com, jmattson@google.com,
joro@8bytes.org, gurchetansingh@chromium.org, kraxel@redhat.com,
zzyiwei@google.com, ankita@nvidia.com, jgg@nvidia.com,
alex.williamson@redhat.com, maz@kernel.org,
oliver.upton@linux.dev, james.morse@arm.com,
suzuki.poulose@arm.com, yuzenghui@huawei.com,
Yan Zhao <yan.y.zhao@intel.com>,
Zhenyu Wang <zhenyuw@linux.intel.com>
Subject: [PATCH 3/4] KVM: VMX: Honor guest PATs for memslots of flag KVM_MEM_NON_COHERENT_DMA
Date: Fri, 5 Jan 2024 17:15:35 +0800 [thread overview]
Message-ID: <20240105091535.24760-1-yan.y.zhao@intel.com> (raw)
In-Reply-To: <20240105091237.24577-1-yan.y.zhao@intel.com>
Honor guest PATs in the range of memslots of flag KVM_MEM_NON_COHERENT_DMA
set no matter the value of noncoherent dma count.
Just honoring guest PATs (without honoring guest MTRRs) for memslots of
flag KVM_MEM_NON_COHERENT_DMA is because
- guest OS will ensure no page aliasing issue in guest side by honoring
guest MTRRs in guest page table.
Combinations like guest MTRR=WC or UC, guest PAT = WB is not allowed.
(at least in Linux, see pat_x_mtrr_type()).
- guest device driver programs device hardware according to guest PATs in
modern platforms.
Besides, we don't break down an EPT huge page if guest MTRRs in its range
are not consistent, because
- guest should have chosen correct guest PATs according to guest MTRRs.
- in normal platforms, small guest pages with different PATs must
correspond to different TLBs though they are mapped in a huge page in
EPT.
However, one condition may not be supported well by honoring guest PAT
alone -- when guest MTRR=WC, guest PAT=UC-.
By honoring guest MTRRs+PATs, the effective memory type is WC; while
by honoring guest PATs alone, the effective memory type is UC.
But it's arguable to support such a usage.
Suggested-by: Sean Christopherson <seanjc@google.com>
Cc: Kevin Tian <kevin.tian@intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Tested-by: Yongwei Ma <yongwei.ma@intel.com>
Signed-off-by: Yan Zhao <yan.y.zhao@intel.com>
---
arch/x86/kvm/vmx/vmx.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 85a23765e506..99f22589fa6d 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -7600,6 +7600,9 @@ static u8 vmx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio,
if (is_mmio)
return MTRR_TYPE_UNCACHABLE << VMX_EPT_MT_EPTE_SHIFT;
+ if (slot->flags & KVM_MEM_NON_COHERENT_DMA)
+ return MTRR_TYPE_WRBACK << VMX_EPT_MT_EPTE_SHIFT;
+
if (!kvm_arch_has_noncoherent_dma(vcpu->kvm))
return (MTRR_TYPE_WRBACK << VMX_EPT_MT_EPTE_SHIFT) | VMX_EPT_IPAT_BIT;
--
2.17.1
next prev parent reply other threads:[~2024-01-05 9:44 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-05 9:12 [PATCH 0/4] KVM: Honor guest memory types for virtio GPU devices Yan Zhao
2024-01-05 9:13 ` [PATCH 1/4] KVM: Introduce a new memslot flag KVM_MEM_NON_COHERENT_DMA Yan Zhao
2024-01-05 9:14 ` [PATCH 2/4] KVM: x86: Add a new param "slot" to op get_mt_mask in kvm_x86_ops Yan Zhao
2024-01-05 9:15 ` Yan Zhao [this message]
2024-01-05 9:16 ` [PATCH 4/4] KVM: selftests: Set KVM_MEM_NON_COHERENT_DMA as a supported memslot flag Yan Zhao
2024-01-05 19:55 ` [PATCH 0/4] KVM: Honor guest memory types for virtio GPU devices Jason Gunthorpe
2024-01-08 6:02 ` Yan Zhao
2024-01-08 14:02 ` Jason Gunthorpe
2024-01-08 15:25 ` Daniel Vetter
2024-01-08 15:38 ` Jason Gunthorpe
2024-01-08 23:36 ` Yan Zhao
2024-01-09 0:22 ` Jason Gunthorpe
2024-01-09 2:11 ` Yan Zhao
2024-01-15 16:30 ` Jason Gunthorpe
2024-01-16 0:45 ` Tian, Kevin
2024-01-16 4:05 ` Tian, Kevin
2024-01-16 12:54 ` Jason Gunthorpe
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