[PATCH v1 11/14] arm_mpam: Fix Downstream and internal priority mask

[Amit Singh Tomar <amitsinght@marvell.com>]

MPAMF_PRI_IDR_NS[DSPRI_WD] determines the number of implemented bits in
the downstream priority field (MPAMCFG_PRI_NS). For instance, if the value
of DSPRI_WD is 4, then the maximum value for dspri is 0xf, and mask should
be GENMASK(3,0).

But with current implementation, it turned out to be GENMASK(4,0) .i.e.
0x1f instead of 0xf.

u16 dspri = GENMASK(rprops->dspri_wd, 0);

Let's fix it (for both downstream, and internal), by subtracting 1 from
DSPRI_WD, and INTPRI_WD value.

Signed-off-by: Amit Singh Tomar <amitsinght@marvell.com>
---
Changes since RFC:
		* Include fix for INTPRI as well.
---
 drivers/platform/mpam/mpam_devices.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/platform/mpam/mpam_devices.c b/drivers/platform/mpam/mpam_devices.c
index 3ef9e5d70afc..9953f2050d35 100644
--- a/drivers/platform/mpam/mpam_devices.c
+++ b/drivers/platform/mpam/mpam_devices.c
@@ -1099,8 +1099,8 @@ static void mpam_reprogram_ris_partid(struct mpam_msc_ris *ris, u16 partid,
 	struct mpam_msc *msc = ris->msc;
 	u16 bwa_fract = MPAMCFG_MBW_MAX_MAX;
 	struct mpam_props *rprops = &ris->props;
-	u16 dspri = GENMASK(rprops->dspri_wd, 0);
-	u16 intpri = GENMASK(rprops->intpri_wd, 0);
+	u16 dspri = GENMASK((rprops->dspri_wd - 1), 0);
+	u16 intpri = GENMASK((rprops->intpri_wd - 1), 0);
 
 	lockdep_assert_held(&msc->lock);
 
-- 
2.25.1