From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Tom Lendacky <thomas.lendacky@amd.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Arjan van de Ven <arjan@linux.intel.com>,
Huang Rui <ray.huang@amd.com>, Juergen Gross <jgross@suse.com>,
Dimitri Sivanich <dimitri.sivanich@hpe.com>,
Sohil Mehta <sohil.mehta@intel.com>,
K Prateek Nayak <kprateek.nayak@amd.com>,
Kan Liang <kan.liang@linux.intel.com>,
Zhang Rui <rui.zhang@intel.com>,
"Paul E. McKenney" <paulmck@kernel.org>,
Feng Tang <feng.tang@intel.com>,
Andy Shevchenko <andy@infradead.org>,
Michael Kelley <mhklinux@outlook.com>,
"Peter Zijlstra (Intel)" <peterz@infradead.org>
Subject: [patch v2 29/30] x86/cpu/topology: Provide __num_[cores|threads]_per_package
Date: Tue, 23 Jan 2024 14:11:37 +0100 (CET) [thread overview]
Message-ID: <20240118123650.197180058@linutronix.de> (raw)
In-Reply-To: <20240118123127.055361964@linutronix.de>
From: Thomas Gleixner <tglx@linutronix.de>
Expose properly accounted information and accessors so the fiddling with
other topology variables can be replaced.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/x86/include/asm/topology.h | 12 ++++++++++++
arch/x86/kernel/cpu/common.c | 6 ++++++
arch/x86/kernel/cpu/topology.c | 8 +++++++-
3 files changed, 25 insertions(+), 1 deletion(-)
---
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -146,6 +146,8 @@ extern const struct cpumask *cpu_cluster
extern unsigned int __max_dies_per_package;
extern unsigned int __max_logical_packages;
extern unsigned int __max_threads_per_core;
+extern unsigned int __num_threads_per_package;
+extern unsigned int __num_cores_per_package;
static inline unsigned int topology_max_packages(void)
{
@@ -157,6 +159,16 @@ static inline unsigned int topology_max_
return __max_dies_per_package;
}
+static inline unsigned int topology_num_cores_per_package(void)
+{
+ return __num_cores_per_package;
+}
+
+static inline unsigned int topology_num_threads_per_package(void)
+{
+ return __num_threads_per_package;
+}
+
#ifdef CONFIG_X86_LOCAL_APIC
int topology_get_logical_id(u32 apicid, enum x86_topology_domains at_level);
#else
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -81,6 +81,12 @@ EXPORT_SYMBOL(__max_dies_per_package);
unsigned int __max_logical_packages __ro_after_init = 1;
EXPORT_SYMBOL(__max_logical_packages);
+unsigned int __num_cores_per_package __ro_after_init = 1;
+EXPORT_SYMBOL(__num_cores_per_package);
+
+unsigned int __num_threads_per_package __ro_after_init = 1;
+EXPORT_SYMBOL(__num_threads_per_package);
+
static struct ppin_info {
int feature;
int msr_ppin_ctl;
--- a/arch/x86/kernel/cpu/topology.c
+++ b/arch/x86/kernel/cpu/topology.c
@@ -386,7 +386,7 @@ void __init topology_init_possible_cpus(
unsigned int disabled = topo_info.nr_disabled_cpus;
unsigned int cnta, cntb, cpu, allowed = 1;
unsigned int total = assigned + disabled;
- u32 apicid;
+ u32 apicid, firstid;
if (!restrict_to_up()) {
if (WARN_ON_ONCE(assigned > nr_cpu_ids)) {
@@ -422,6 +422,12 @@ void __init topology_init_possible_cpus(
__max_threads_per_core = 1U << (get_count_order(cntb) - get_count_order(cnta));
pr_info("Max. threads per core: %3u\n", __max_threads_per_core);
+ firstid = find_first_bit(apic_maps[TOPO_SMT_DOMAIN].map, MAX_LOCAL_APIC);
+ __num_cores_per_package = topology_unit_count(firstid, TOPO_CORE_DOMAIN, TOPO_PKG_DOMAIN);
+ pr_info("Num. cores per package: %3u\n", __num_cores_per_package);
+ __num_threads_per_package = topology_unit_count(firstid, TOPO_SMT_DOMAIN, TOPO_PKG_DOMAIN);
+ pr_info("Num. threads per package: %3u\n", __num_threads_per_package);
+
pr_info("Allowing %u present CPUs plus %u hotplug CPUs\n", assigned, disabled);
if (topo_info.nr_rejected_cpus)
pr_info("Rejected CPUs %u\n", topo_info.nr_rejected_cpus);
next prev parent reply other threads:[~2024-01-23 13:11 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-23 13:10 [patch v2 00/30] x86/apic: Rework APIC registration Thomas Gleixner
2024-01-23 13:10 ` [patch v2 01/30] x86/cpu/topology: Move registration out of APIC code Thomas Gleixner
2024-01-23 13:10 ` [patch v2 02/30] x86/cpu/topology: Provide separate APIC registration functions Thomas Gleixner
2024-01-23 13:10 ` [patch v2 03/30] x86/acpi: Use new " Thomas Gleixner
2024-01-23 13:10 ` [patch v2 04/30] x86/jailhouse: Use new APIC registration function Thomas Gleixner
2024-01-23 13:10 ` [patch v2 05/30] x86/of: Use new APIC registration functions Thomas Gleixner
2024-01-23 13:10 ` [patch v2 06/30] x86/mpparse: Use new APIC registration function Thomas Gleixner
2024-01-23 13:11 ` [patch v2 07/30] x86/acpi: Dont invoke topology_register_apic() for XEN PV Thomas Gleixner
2024-01-23 13:11 ` [patch v2 08/30] x86/xen/smp_pv: Register fake APICs Thomas Gleixner
2024-01-23 13:11 ` [patch v2 09/30] x86/cpu/topology: Confine topology information Thomas Gleixner
2024-01-23 13:11 ` [patch v2 10/30] x86/cpu/topology: Simplify APIC registration Thomas Gleixner
2024-01-23 13:11 ` [patch v2 11/30] x86/cpu/topology: Use a data structure for topology info Thomas Gleixner
2024-01-23 13:11 ` [patch v2 12/30] x86/smpboot: Make error message actually useful Thomas Gleixner
2024-01-23 13:11 ` [patch v2 13/30] x86/cpu/topology: Sanitize the APIC admission logic Thomas Gleixner
2024-01-23 13:11 ` [patch v2 14/30] x86/cpu/topology: Rework possible CPU management Thomas Gleixner
2024-01-31 23:47 ` Sohil Mehta
2024-01-23 13:11 ` [patch v2 15/30] x86/cpu: Detect real BSP on crash kernels Thomas Gleixner
2024-01-31 17:59 ` Michael Kelley
2024-01-23 13:11 ` [patch v2 16/30] x86/topology: Add a mechanism to track topology via APIC IDs Thomas Gleixner
2024-01-23 13:11 ` [patch v2 17/30] x86/cpu/topology: Reject unknown APIC IDs on ACPI hotplug Thomas Gleixner
2024-01-23 13:11 ` [patch v2 18/30] x86/cpu/topology: Assign hotpluggable CPUIDs during init Thomas Gleixner
2024-01-23 13:11 ` [patch v2 19/30] x86/xen/smp_pv: Count number of vCPUs early Thomas Gleixner
2024-01-23 13:11 ` [patch v2 20/30] x86/cpu/topology: Let XEN/PV use topology from CPUID/MADT Thomas Gleixner
2024-01-23 13:11 ` [patch v2 21/30] x86/cpu/topology: Use topology bitmaps for sizing Thomas Gleixner
2024-01-26 7:07 ` Zhang, Rui
2024-01-26 20:22 ` Thomas Gleixner
2024-01-28 20:01 ` Paul E. McKenney
2024-02-12 16:40 ` Thomas Gleixner
2024-02-12 19:49 ` Michael Kelley
2024-02-13 20:23 ` Sohil Mehta
2024-01-23 13:11 ` [patch v2 22/30] x86/cpu/topology: Mop up primary thread mask handling Thomas Gleixner
2024-01-23 13:11 ` [patch v2 23/30] x86/cpu/topology: Simplify cpu_mark_primary_thread() Thomas Gleixner
2024-01-23 13:11 ` [patch v2 24/30] x86/cpu/topology: Provide logical pkg/die mapping Thomas Gleixner
2024-01-23 13:11 ` [patch v2 25/30] x86/cpu/topology: Use topology logical mapping mechanism Thomas Gleixner
2024-02-01 22:31 ` Sohil Mehta
2024-02-02 6:45 ` Zhang, Rui
2024-02-12 16:21 ` Thomas Gleixner
2024-01-23 13:11 ` [patch v2 26/30] x86/cpu/topology: Retrieve cores per package from topology bitmaps Thomas Gleixner
2024-01-23 13:11 ` [patch v2 27/30] x86/cpu/topology: Rename smp_num_siblings Thomas Gleixner
2024-01-23 13:11 ` [patch v2 28/30] x86/cpu/topology: Rename topology_max_die_per_package() Thomas Gleixner
2024-01-23 13:11 ` Thomas Gleixner [this message]
2024-01-23 13:11 ` [patch v2 30/30] x86/cpu/topology: Get rid of cpuinfo::x86_max_cores Thomas Gleixner
2024-01-24 14:31 ` [patch v2 00/30] x86/apic: Rework APIC registration Zhang, Rui
2024-02-01 22:10 ` Sohil Mehta
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