From: Nathan Morrisson <nmorrisson@phytec.com>
To: nm@ti.com, vigneshr@ti.com, kristo@kernel.org,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
conor+dt@kernel.org
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, upstream@lists.phytec.de
Subject: [PATCH] arm64: dts: ti: Disable clock output of the ethernet PHY
Date: Fri, 19 Jan 2024 14:52:57 -0800 [thread overview]
Message-ID: <20240119225257.403222-1-nmorrisson@phytec.com> (raw)
The clock on the ethernet1 PHY is turned on by default. This turns
the clock off as we do not use it.
Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
---
arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts
index 4bc0134c987d..3173f6eca7ca 100644
--- a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts
@@ -222,6 +222,7 @@ &cpsw3g_mdio {
cpsw3g_phy3: ethernet-phy@3 {
compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22";
reg = <3>;
+ ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
};
--
2.25.1
next reply other threads:[~2024-01-19 22:53 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-19 22:52 Nathan Morrisson [this message]
2024-01-22 2:54 ` Wadim Egorov
2024-02-06 4:32 ` Vignesh Raghavendra
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