From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 20BFB1FB2; Thu, 25 Jan 2024 02:55:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.55.52.93 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706151328; cv=none; b=Cy0lkdiyZp60I4bqaSwz5gq4X9LTU49jN5XjtJuLEUA0QrkhXOEOSypWLZP/7kur4DvxejGS59BbPCl/YAeH2VTPV5B/xJaedtxKC4bfVIPydf0393ZJtDEZM1ojIJRPeSkve1PRFUgAqzyk+CjJLyNJkvacV+NWgNMDmlJoz5s= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706151328; c=relaxed/simple; bh=XlfRlivdUQW1sAwDNDH/UEwgJtqmjkPpXNS9B0baTNk=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=mA9ZVYFkLUeoiBADX4vdU4Ethti2VmRCiSRhaJ5bL3kHbpT45HjzlF7dvZZJ9Vw3IWg3rosTE7gu5ddtoJ30pVle7OPqoHLdGeEeYqoEJkb0Jf4N0ALqr2qHl8sGY1XB4XILiu3JSaE2kh37A/AXqkJvm9zWGh3ERTqqOOt28Zo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ZQ6nlzlH; arc=none smtp.client-ip=192.55.52.93 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ZQ6nlzlH" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706151327; x=1737687327; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=XlfRlivdUQW1sAwDNDH/UEwgJtqmjkPpXNS9B0baTNk=; b=ZQ6nlzlHPjOFNbQlrTXT7jSn7Pe9tZP+ok35Tn1aqoWHMPxC5K8bAm6z DHQeb2FpVMrLW4Jt5XKXvNCxFugOs9U8wte+VifB7atH8HGd8Eq5lV0Bh M9w6ZyxKtzzRO0EpA2wXKnv8vqXmOM8zGyqQVfGqGcIIfsDcQrBiJH37M havn5A6dJqVJzgVn1GvM5lI277Q4ibP87kKo17PV2CGI1559JyHvMIUTp uzgAsfYgIwdwSu9gqdYKGFNq4WLzEg3LdsRu0+zYHSdwqTK7GoXmzBxfR MxCBI+oTLycaetRplgUYqgKa2QwyChr7//reWcoPDmFn6YQAAvUbyX3G+ A==; X-IronPort-AV: E=McAfee;i="6600,9927,10962"; a="399197743" X-IronPort-AV: E=Sophos;i="6.05,216,1701158400"; d="scan'208";a="399197743" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jan 2024 18:55:26 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10962"; a="929882085" X-IronPort-AV: E=Sophos;i="6.05,216,1701158400"; d="scan'208";a="929882085" Received: from ranerica-svr.sc.intel.com ([172.25.110.23]) by fmsmga001.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jan 2024 18:55:26 -0800 Date: Wed, 24 Jan 2024 18:56:52 -0800 From: Ricardo Neri To: x86@kernel.org Cc: Andreas Herrmann , Catalin Marinas , Chen Yu , Len Brown , Radu Rendec , Pierre Gondois , Pu Wen , "Rafael J. Wysocki" , Sudeep Holla , Srinivas Pandruvada , Will Deacon , Zhang Rui , Huang Ying , "Ravi V. Shankar" , stable@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 0/4] x86/cacheinfo: Set the number of leaves per CPU Message-ID: <20240125025652.GA15039@ranerica-svr.sc.intel.com> References: <20231212222519.12834-1-ricardo.neri-calderon@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231212222519.12834-1-ricardo.neri-calderon@linux.intel.com> User-Agent: Mutt/1.9.4 (2018-02-28) On Tue, Dec 12, 2023 at 02:25:15PM -0800, Ricardo Neri wrote: > Hi, > > The interface /sys/devices/system/cpu/cpuX/cache is broken (not populated) > if CPUs have different numbers of subleaves in CPUID 4. This is the case > of Intel Meteor Lake. Hello. Wondering if there is any feedback on this patchset. The interface /sys/devices/system/cpu/cpuX/cache is still broken on Meteor Lake with v6.8-rc1. I verified that this patchset applies cleanly on v6.8-rc1. Thanks and BR, Ricardo