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Tue, 30 Jan 2024 23:09:03 -0800 (PST) Received: from [127.0.1.1] ([103.28.246.26]) by smtp.gmail.com with ESMTPSA id lp17-20020a056a003d5100b006ddd182bf1csm9087956pfb.46.2024.01.30.23.08.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Jan 2024 23:09:03 -0800 (PST) From: Manivannan Sadhasivam Date: Wed, 31 Jan 2024 12:37:34 +0530 Subject: [PATCH v3 11/17] arm64: dts: qcom: sm8150: Fix UFS PHY clocks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240131-ufs-phy-clock-v3-11-58a49d2f4605@linaro.org> References: <20240131-ufs-phy-clock-v3-0-58a49d2f4605@linaro.org> In-Reply-To: <20240131-ufs-phy-clock-v3-0-58a49d2f4605@linaro.org> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, quic_cang@quicinc.com, Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1280; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=ROl06bKVN5C5JMVM/k0aozEkWtTHx+mchi2GT8R0eL0=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBlufG9iupD1/Y4aBPSYlnuMUF3Udkm8VJwVjvGz uoQhWBDgyWJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZbnxvQAKCRBVnxHm/pHO 9YyOB/47DylBxJWasrkUuurfb0gcQALAFgW3b7qLrDKrxTl/uNX6iZj7wgH2YdtS3/PK96mUaXK wB7CxJOcNjN/25xYGPRnyCTK/qkRl7jwXKD1YuMsE0HQaWYjQSTehD6GZwk9OpoGc89D30CmNjY 2krUhFisIhqOYNl+MMZYPcJ48WnsA3uJFiYfjCVE4CKhdcfGrsFEgz2MZf1BpKWi8gNXQdRHYES O88WjY1ujPXxjyUL9/GZRdqqbpucDSRDJsqtU/pwFgR6pvICvAmRqz4mMFY+L808ETRMIthPUpD hbkKONYrb2Wkwd+OH5Ih/Lonh4C+dr7mr2PvDZLPL5AgXY1J X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 QMP PHY used in SM8150 requires 3 clocks: * ref - 19.2MHz reference clock from RPMh * ref_aux - Auxiliary reference clock from GCC * qref - QREF clock from GCC While at it, let's move 'clocks' property before 'clock-names' to match the style used commonly. Fixes: 3834a2e92229 ("arm64: dts: qcom: sm8150: Add ufs nodes") Reviewed-by: Konrad Dybcio Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index ad1af87991ff..eb1acea2631b 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -2095,10 +2095,12 @@ ufs_mem_phy: phy@1d87000 { compatible = "qcom,sm8150-qmp-ufs-phy"; reg = <0 0x01d87000 0 0x1000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, + <&gcc GCC_UFS_MEM_CLKREF_CLK>; clock-names = "ref", - "ref_aux"; - clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, - <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + "ref_aux", + "qref"; power-domains = <&gcc UFS_PHY_GDSC>; -- 2.25.1