From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2CA5512BF1E; Tue, 13 Feb 2024 00:24:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707783847; cv=none; b=JNPZyz9yqM+60/MU8Rk9fF5mWVLau27bGvIXmUT6rZ4dGeyZPN91ssk8yGnkcrVbQReUAFfS5xEd1X5OjX6mOS7x0Osn14XH6Pz6/PsxVRI/Ikp9wRMLjhs10t+cPeeU7EIHA0GlxHFZGfUx2HKspSHgGRWAvG19TQHVx/tGNg4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707783847; c=relaxed/simple; bh=IkhcJ+3ckPAvRvz208utdkKUoD7lpA1NnbbWdhsjv2I=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=l5ZvB3QH3Elii/SzkimefyGmL9T9VmF5IpvzAFOwYPSfHDWwzEna0s/GKXz/KiGmdFgYBVQ2C4Ug9FBiaePSLANGtuCxXs51vVVtz0SlPAXj2EaFkETmqKP1wjQDuYpMkbPjdX9xJGlvXtQipNXhL1YLTj9JqGDtRHxjUhl8KY4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lTKny/bd; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lTKny/bd" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B92ACC433F1; Tue, 13 Feb 2024 00:24:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707783846; bh=IkhcJ+3ckPAvRvz208utdkKUoD7lpA1NnbbWdhsjv2I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lTKny/bduGojLGA+paWmHw1xkIfTnADCMdfkPGpiiEnZIyMJ8gJvqVLdz1XWh99HZ d+IiEObI5C1t+kNbYtm7uZtp3rRSqY6WNe2LBxhEidlR5q7yP1E6Tee6LZW4DMg6So ymoEDJ0aORlDHND2E6SR6W6Y2+ESgpUdMjzQfTRpxp4RcKmahDSqpbnw1bXGoPrB+y H5zyBz8Mp9OzchbvIGKUpryiWUM2XZpmSOYxYTVHavApZXVdeBSC18H/sFEjBNYhOl H6nJN2yyQOrcCUIyPX4GmOvCt1twAZdLt0Q3Y+yC1b9fm8Yq9bhnP4drJN2/F4OMUC zgNclxa9DbK1A== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Prike Liang , Alex Deucher , Sasha Levin , christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch, Hawking.Zhang@amd.com, lijo.lazar@amd.com, le.ma@amd.com, James.Zhu@amd.com, shane.xiao@amd.com, sonny.jiang@amd.com, Likun.Gao@amd.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH AUTOSEL 5.15 21/22] drm/amdgpu: reset gpu for s3 suspend abort case Date: Mon, 12 Feb 2024 19:23:23 -0500 Message-ID: <20240213002331.672583-21-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240213002331.672583-1-sashal@kernel.org> References: <20240213002331.672583-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-stable-base: Linux 5.15.148 Content-Transfer-Encoding: 8bit From: Prike Liang [ Upstream commit 6ef82ac664bb9568ca3956e0d9c9c478e25077ff ] In the s3 suspend abort case some type of gfx9 power rail not turn off from FCH side and this will put the GPU in an unknown power status, so let's reset the gpu to a known good power state before reinitialize gpu device. Signed-off-by: Prike Liang Acked-by: Alex Deucher Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/amdgpu/soc15.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c index e8c0e77e1b01..6a3486f52d69 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.c +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c @@ -1490,10 +1490,32 @@ static int soc15_common_suspend(void *handle) return soc15_common_hw_fini(adev); } +static bool soc15_need_reset_on_resume(struct amdgpu_device *adev) +{ + u32 sol_reg; + + sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81); + + /* Will reset for the following suspend abort cases. + * 1) Only reset limit on APU side, dGPU hasn't checked yet. + * 2) S3 suspend abort and TOS already launched. + */ + if (adev->flags & AMD_IS_APU && adev->in_s3 && + !adev->suspend_complete && + sol_reg) + return true; + + return false; +} + static int soc15_common_resume(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; + if (soc15_need_reset_on_resume(adev)) { + dev_info(adev->dev, "S3 suspend abort case, let's reset ASIC.\n"); + soc15_asic_reset(adev); + } return soc15_common_hw_init(adev); } -- 2.43.0