mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Rob Herring <robh@kernel.org>
To: Prabhakar <prabhakar.csengg@gmail.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
	Linus Walleij <linus.walleij@linaro.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Magnus Damm <magnus.damm@gmail.com>,
	linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [RFC PATCH 02/13] dt-bindings: pinctrl: renesas: Document RZ/V2H(P) SoC
Date: Wed, 27 Mar 2024 12:24:39 -0500	[thread overview]
Message-ID: <20240327172439.GA3664500-robh@kernel.org> (raw)
In-Reply-To: <20240326222844.1422948-3-prabhakar.mahadev-lad.rj@bp.renesas.com>

On Tue, Mar 26, 2024 at 10:28:33PM +0000, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Add documentation for the pin controller found on the Renesas RZ/V2H(P)
> (R9A09G057) SoC. Compared to RZ/G2L family of SoCs there are slight
> differences on the RZ/V2H(P) SoC for pinmuxing.
> 
> Also add 'renesas-rzv2h,output-impedance' property. Drive strength
> setting on RZ/V2H(P) depends on the different power rails which are
> coming out from the PMIC (connected via i2c). These power rails
> (required for drive strength) can be 1.2/1.8/3.3V.
> 
> Pin are grouped into 4 groups,
> 
> Group1: Impedance
> - 150/75/38/25 ohms (at 3.3 V)
> - 130/65/33/22 ohms (at 1.8 V)
> 
> Group2: Impedance
> - 50/40/33/25 ohms (at 1.8 V)
> 
> Group3: Impedance
> - 150/75/37.5/25 ohms (at 3.3 V)
> - 130/65/33/22 ohms (at 1.8 V)
> 
> Group4: Impedance
> - 110/55/30/20 ohms (at 1.8 V)
> - 150/75/38/25 ohms (at 1.2 V)
> 
> 'renesas-rzv2h,output-impedance' property as documented which can be
> [1, 2, 4, 6] indicates x Value strength.

Looks like the values are x1, x1.5, x3ish, x6...

> 
> As the power rail information cannot be available very early in the
> boot process as 'renesas-rzv2h,output-impedance' property is added
> instead of reusing output-impedance-ohms property.
> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
>  .../pinctrl/renesas,rzg2l-pinctrl.yaml        | 22 +++++++++++++++----
>  1 file changed, 18 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
> index 881e992adca3..77f4fc7f4a21 100644
> --- a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
> @@ -26,6 +26,7 @@ properties:
>                - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five
>                - renesas,r9a07g044-pinctrl # RZ/G2{L,LC}
>                - renesas,r9a08g045-pinctrl # RZ/G3S
> +              - renesas,r9a09g057-pinctrl # RZ/V2H(P)
>  
>        - items:
>            - enum:
> @@ -66,10 +67,14 @@ properties:
>      maxItems: 1
>  
>    resets:
> -    items:
> -      - description: GPIO_RSTN signal
> -      - description: GPIO_PORT_RESETN signal
> -      - description: GPIO_SPARE_RESETN signal
> +    oneOf:
> +      - items:
> +          - description: GPIO_RSTN signal
> +          - description: GPIO_PORT_RESETN signal
> +          - description: GPIO_SPARE_RESETN signal
> +      - items:
> +          - description: PFC main reset
> +          - description: Reset for the control register related to WDTUDFCA and WDTUDFFCM pins
>  
>  additionalProperties:
>    anyOf:
> @@ -111,6 +116,15 @@ additionalProperties:
>          output-high: true
>          output-low: true
>          line-name: true
> +        renesas-rzv2h,output-impedance:

'renesas-rzv2h' is not a vendor.

That should give you a warning if you actually used this somewhere.

> +          description: |
> +            Output impedance for pins on RZ/V2H(P) SoC.
> +            x1: Corresponds to 0 in IOLH register.
> +            x2: Corresponds to 1 in IOLH register.
> +            x4: Corresponds to 2 in IOLH register.
> +            x6: Corresponds to 3 in IOLH register.

Why not just use 0-3 for the values? 


> +          $ref: /schemas/types.yaml#/definitions/uint32
> +          enum: [1, 2, 4, 6]
>  
>      - type: object
>        additionalProperties:
> -- 
> 2.34.1
> 

  reply	other threads:[~2024-03-27 17:24 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-26 22:28 [RFC PATCH 00/13] Add PFC support for Renesas " Prabhakar
2024-03-26 22:28 ` [RFC PATCH 01/13] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Remove the check from the object Prabhakar
2024-03-27 17:16   ` Rob Herring
2024-03-26 22:28 ` [RFC PATCH 02/13] dt-bindings: pinctrl: renesas: Document RZ/V2H(P) SoC Prabhakar
2024-03-27 17:24   ` Rob Herring [this message]
2024-03-27 18:58     ` Lad, Prabhakar
2024-03-26 22:28 ` [RFC PATCH 03/13] pinctrl: renesas: pinctrl-rzg2l: Remove extra space in function parameter Prabhakar
2024-03-26 22:28 ` [RFC PATCH 04/13] pinctrl: renesas: pinctrl-rzg2l: Allow more bits for pin configuration Prabhakar
2024-03-26 22:28 ` [RFC PATCH 05/13] pinctrl: renesas: pinctrl-rzg2l: Allow parsing of variable configuration for all architectures Prabhakar
2024-03-26 22:28 ` [RFC PATCH 06/13] pinctrl: renesas: pinctrl-rzg2l: Make cfg to u64 in struct rzg2l_variable_pin_cfg Prabhakar
2024-03-28 14:13   ` Geert Uytterhoeven
2024-03-28 19:53     ` Lad, Prabhakar
2024-03-26 22:28 ` [RFC PATCH 07/13] pinctrl: renesas: pinctrl-rzg2l: Validate power registers for SD and ETH Prabhakar
2024-03-27  7:58   ` Dan Carpenter
2024-03-27  8:13     ` Lad, Prabhakar
2024-03-28  8:01   ` claudiu beznea
2024-03-28 19:40     ` Lad, Prabhakar
2024-03-26 22:28 ` [RFC PATCH 08/13] pinctrl: renesas: pinctrl-rzg2l: Add function pointers for writing to PFC Prabhakar
2024-03-28  8:02   ` claudiu beznea
2024-03-28  8:13     ` claudiu beznea
2024-03-28 19:45       ` Lad, Prabhakar
2024-03-26 22:28 ` [RFC PATCH 09/13] pinctrl: renesas: pinctrl-rzg2l: Add function pointer for writing to PMC register Prabhakar
2024-03-26 22:28 ` [RFC PATCH 10/13] pinctrl: renesas: pinctrl-rzg2l: Add function pointers for reading/writing OEN register Prabhakar
2024-03-26 22:28 ` [RFC PATCH 11/13] pinctrl: renesas: pinctrl-rzg2l: Pass pincontrol device pointer to pinconf_generic_parse_dt_config() Prabhakar
2024-03-26 22:28 ` [RFC PATCH 12/13] pinctrl: renesas: pinctrl-rzg2l: Add support to pass custom params Prabhakar
2024-03-26 22:28 ` [RFC PATCH 13/13] pinctrl: renesas: pinctrl-rzg2l: Add support for RZ/V2H SoC Prabhakar
2024-03-28  8:04   ` claudiu beznea
2024-03-28 19:51     ` Lad, Prabhakar
2024-03-29  6:36       ` claudiu beznea

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240327172439.GA3664500-robh@kernel.org \
    --to=robh@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=fabrizio.castro.jz@renesas.com \
    --cc=geert+renesas@glider.be \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=linus.walleij@linaro.org \
    --cc=linux-gpio@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-renesas-soc@vger.kernel.org \
    --cc=magnus.damm@gmail.com \
    --cc=prabhakar.csengg@gmail.com \
    --cc=prabhakar.mahadev-lad.rj@bp.renesas.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®