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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id a14-20020a1709065f8e00b00a559bbe8a00sm12131014eju.100.2024.04.30.03.07.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Apr 2024 03:07:27 -0700 (PDT) Date: Tue, 30 Apr 2024 12:07:26 +0200 From: Andrew Jones To: Charlie Jenkins Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Guo Ren , Conor Dooley , Conor Dooley , =?utf-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= , Evan Green , Palmer Dabbelt , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 1/2] riscv: cpufeature: Fix thead vector hwcap removal Message-ID: <20240430-6781cbaa0a929246cb77dafd@orel> References: <20240429-cpufeature_fixes-v3-0-6aa11dde513b@rivosinc.com> <20240429-cpufeature_fixes-v3-1-6aa11dde513b@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240429-cpufeature_fixes-v3-1-6aa11dde513b@rivosinc.com> On Mon, Apr 29, 2024 at 03:29:51PM GMT, Charlie Jenkins wrote: ... > + * > + * Disable vector if the boot hart has a T-Head mvendorid and an marchid of 0. I probably would have added the 'why' to this comment, i.e. T-Head doesn't have standard V so things will break if we try to use it, or whatever. The 'what' alone is just putting the easy to read condition below into English, making it an unnecessary comment. Thanks, drew > */ > - if (acpi_disabled && riscv_cached_mvendorid(cpu) == THEAD_VENDOR_ID && > - riscv_cached_marchid(cpu) == 0x0) { > + if (acpi_disabled && boot_vendorid == THEAD_VENDOR_ID && boot_archid == 0x0) { > this_hwcap &= ~isa2hwcap[RISCV_ISA_EXT_v]; > clear_bit(RISCV_ISA_EXT_v, isainfo->isa); > } > > -- > 2.44.0 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv