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Mercier" To: tjmercier@google.com, Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Jonathan Corbet , Tianyu Lan Cc: petr@tesarici.cz, mhklinux@outlook.com, robin.murphy@arm.com, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Commit 20347fca71a3 ("swiotlb: split up the global swiotlb lock") added the ability to specify the number of SWIOTLB areas, but boot-options.rst was not updated as part of that commit. Reported-by: Michael Kelley Fixes: 20347fca71a3 ("swiotlb: split up the global swiotlb lock") Signed-off-by: T.J. Mercier --- Documentation/arch/x86/x86_64/boot-options.rst | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/arch/x86/x86_64/boot-options.rst b/Documentation/arch/x86/x86_64/boot-options.rst index a37139d1752f..18161657b301 100644 --- a/Documentation/arch/x86/x86_64/boot-options.rst +++ b/Documentation/arch/x86/x86_64/boot-options.rst @@ -287,9 +287,11 @@ iommu options only relevant to the AMD GART hardware IOMMU: iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU implementation: - swiotlb=[,force,noforce] + swiotlb=[,,force,noforce] Prereserve that many 2K slots for the software IO bounce buffering. + + Number of SWIOTLB areas with their own lock. Must be a power of 2. force Force all IO through the software TLB. Hardware IOMMU implementations can use SWIOTLB bounce buffering in -- 2.45.0.rc1.225.g2a3ae87e7f-goog