From: Jacky Huang <ychuang570808@gmail.com>
To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, schung@nuvoton.com,
Jacky Huang <ychuang3@nuvoton.com>
Subject: [PATCH V1] arm64: dts: nuvoton: ma35d1: add rtc node
Date: Tue, 4 Jun 2024 08:09:46 +0000 [thread overview]
Message-ID: <20240604080946.80-1-ychuang570808@gmail.com> (raw)
From: Jacky Huang <ychuang3@nuvoton.com>
Add RTC node on MA35D1 and enable the RTC module on SOM and IoT boards.
Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
---
arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts | 4 ++++
arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts | 4 ++++
arch/arm64/boot/dts/nuvoton/ma35d1.dtsi | 8 ++++++++
3 files changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts b/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts
index b89e2be6abae..b3be4331abcf 100644
--- a/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts
+++ b/arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts
@@ -54,3 +54,7 @@ &clk {
"integer",
"integer";
};
+
+&rtc {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts b/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts
index a1ebddecb7f8..9858788a589c 100644
--- a/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts
+++ b/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts
@@ -54,3 +54,7 @@ &clk {
"integer",
"integer";
};
+
+&rtc {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
index 781cdae566a0..394395bfd3ae 100644
--- a/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
+++ b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
@@ -95,6 +95,14 @@ clk: clock-controller@40460200 {
clocks = <&clk_hxt>;
};
+ rtc: rtc@40410000 {
+ compatible = "nuvoton,ma35d1-rtc";
+ reg = <0x0 0x40410000 0x0 0x200>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk RTC_GATE>;
+ status = "disabled";
+ };
+
uart0: serial@40700000 {
compatible = "nuvoton,ma35d1-uart";
reg = <0x0 0x40700000 0x0 0x100>;
--
2.34.1
reply other threads:[~2024-06-04 8:09 UTC|newest]
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