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[142.68.80.239]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6b2a5c58e31sm56074816d6.72.2024.06.17.07.39.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jun 2024 07:39:21 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.95) (envelope-from ) id 1sJDVw-008kP7-Ol; Mon, 17 Jun 2024 11:39:20 -0300 Date: Mon, 17 Jun 2024 11:39:20 -0300 From: Jason Gunthorpe To: Zong Li Cc: Baolu Lu , joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, tjeznach@rivosinc.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, kevin.tian@intel.com, linux-kernel@vger.kernel.org, iommu@lists.linux.dev, linux-riscv@lists.infradead.org Subject: Re: [RFC PATCH v2 04/10] iommu/riscv: add iotlb_sync_map operation support Message-ID: <20240617143920.GD791043@ziepe.ca> References: <20240614142156.29420-1-zong.li@sifive.com> <20240614142156.29420-5-zong.li@sifive.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Mon, Jun 17, 2024 at 09:43:35PM +0800, Zong Li wrote: > I added it for updating the MSI mapping when we change the irq > affinity of a pass-through device to another vCPU. The RISC-V IOMMU > spec allows MSI translation to go through the MSI flat table, MRIF, or > the normal page table. In the case of the normal page table, the MSI > mapping is created in the second-stage page table, mapping the GPA of > the guest's supervisor interrupt file to the HPA of host's guest > interrupt file. This MSI mapping needs to be updated when the HPA of > host's guest interrupt file is changed. It sounds like more thought is needed for the MSI architecture, having the host read the guest page table to mirror weird MSI stuff seems kind of wrong.. The S2 really needs to have the correct physical MSI pages statically at boot time. Jason