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From: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
To: "Shanavas.K.S" <shanavasks@gmail.com>
Cc: linux-kernel@vger.kernel.org
Subject: Re: intel CPU vulnerability NO_SSB whitelist for AIRMONT
Date: Tue, 9 Jul 2024 23:15:26 -0700	[thread overview]
Message-ID: <20240710061526.so5rjsg3trw337ep@desk> (raw)
In-Reply-To: <CAEJ9NQdhh+4GxrtG1DuYgqYhvc0hi-sKZh-2niukJ-MyFLntAA@mail.gmail.com>

On Tue, Jul 09, 2024 at 01:21:44PM +0530, Shanavas.K.S wrote:
> Hi All,
> This is in reference to
> https://github.com/torvalds/linux/blame/master/arch/x86/kernel/cpu/common.c#L1169.
> The whitelist for INTEL_ATOM_AIRMONT has NO_SSB enabled  which means
> cache speculation vulnerability(spectre 4,CVE-2018-3639) is not
> applicable to  this processor. But NO_SSB is not set for
> INTEL_ATOM_AIRMONT_NP and INTEL_ATOM_AIRMONT_MID. Are these settings
> missing for AIRMONT_NP and AIRMONT_MID or is there a real difference
> between cache speculation between these processors?

I believe they were released much later than AIRMONT and hence should be
enumerating MSR IA32_ARCH_CAPABILITIES[SSB_NO](bit 4). If you have these
system, is bit 4 not set?

If it is set there is no need to explicitly add NO_SSB to the table.

  reply	other threads:[~2024-07-10  6:15 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-09  7:51 Shanavas.K.S
2024-07-10  6:15 ` Pawan Gupta [this message]
     [not found] <CAEJ9NQdJwwpYmGmqm9BESViBDH9P=QQJVZfnO12BTESEKYRFjg@mail.gmail.com>
     [not found] ` <20240807190217.f4ex7xlzb4wpxxnl@desk>
     [not found]   ` <CAEJ9NQcYU6dRZJM818Ae3f-H86BKo=iaya7jbt3BH+G1O1gsQQ@mail.gmail.com>
2024-08-28 11:12     ` Shanavas.K.S

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