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charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIABWRmmYC/43NQQ6CMBCF4auYrq2ZFqrgynsYQ0o7yCxsSYsNh nB3CxsTF8blP8n7ZmYRA2Fk593MAiaK5F2OYr9jptfujpxsbiZBlqCE4vE5DD6MTUJnfWhwGtG to8i1rkBIwFIWwPJ+CNjRtNnXW+6e4ujDa3uVxHr9R02CA29BWatQn2xlL4GSj+TMwfgHW+EkP 9gR6l+YzFity6ITnTVtW39hy7K8AeEP0PcSAQAA To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Evan Green , Andy Chiu Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Charlie Jenkins , Yu Chien Peter Lin X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1721405734; l=3549; i=charlie@rivosinc.com; s=20231120; h=from:subject:message-id; bh=T11RUDtdZrxQtRlAe10gZYbTABjz9NhpNEYG6ImKGDo=; b=YvM9kd3OhQ5dtUus6JjV5CxJNsqvgUI1okaBNI9QJlEuXWV8kW1hmrx8FCnHiXN7zEdgcshu9 Y7CG+SY0/UnANmLoJxkLgj2l8dWHDO8uvmFMETOlRa5c4Z5oUuYgzI0 X-Developer-Key: i=charlie@rivosinc.com; a=ed25519; pk=t4RSWpMV1q5lf/NWIeR9z58bcje60/dbtxxmoSfBEcs= All extensions, both standard and vendor, live in one struct "riscv_isa_ext". There is currently one vendor extension, xandespmu, but it is likely that more vendor extensions will be added to the kernel in the future. As more vendor extensions (and standard extensions) are added, riscv_isa_ext will become more bloated with a mix of vendor and standard extensions. This also allows each vendor to be conditionally enabled through Kconfig. --- This has been split out from the previous series that contained the addition of xtheadvector due to lack of reviews. The xtheadvector support will be posted again separately from this. The alternative patching code from "riscv: Introduce vendor variants of extension helpers" has been migrated to "riscv: Extend cpufeature.c to detect vendor extensions" such that the andes patching still works in that patch. I also fix a bug in this patch from the previous series that the Andes extensions were not being properly enabled due to the manual alternative patching not incrementing the id to be greater than RISCV_VENDOR_EXT_ALTERNATIVES_BASE. To: Paul Walmsley To: Palmer Dabbelt To: Albert Ou To: Conor Dooley To: Evan Green To: Andy Chiu Cc: linux-riscv@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Charlie Jenkins --- Changes in v3: - Rebase onto for-next as there have been a lot of upstream changes! - Link to v2: https://lore.kernel.org/r/20240609-support_vendor_extensions-v2-0-9a43f1fdcbb9@rivosinc.com Changes in v2: - Fixed issue in riscv_fill_vendor_ext_list() that initalizion was only happening properly for the first vendor. Add is_initialized field to riscv_isa_vendor_ext_data_list to allow intialization to be tracked on a per-vendor basis. - Link to v1: https://lore.kernel.org/r/20240515-support_vendor_extensions-v1-0-b05dd5ea7d8d@rivosinc.com --- Charlie Jenkins (4): riscv: Extend cpufeature.c to detect vendor extensions riscv: Add vendor extensions to /proc/cpuinfo riscv: Introduce vendor variants of extension helpers riscv: cpufeature: Extract common elements from extension checking arch/riscv/Kconfig | 2 + arch/riscv/Kconfig.vendor | 19 +++ arch/riscv/errata/andes/errata.c | 3 + arch/riscv/errata/sifive/errata.c | 3 + arch/riscv/errata/thead/errata.c | 3 + arch/riscv/include/asm/cpufeature.h | 103 ++++++++++------ arch/riscv/include/asm/hwcap.h | 25 ++-- arch/riscv/include/asm/vendor_extensions.h | 104 +++++++++++++++++ arch/riscv/include/asm/vendor_extensions/andes.h | 19 +++ arch/riscv/kernel/Makefile | 2 + arch/riscv/kernel/cpu.c | 35 +++++- arch/riscv/kernel/cpufeature.c | 143 ++++++++++++++++------- arch/riscv/kernel/vendor_extensions.c | 56 +++++++++ arch/riscv/kernel/vendor_extensions/Makefile | 3 + arch/riscv/kernel/vendor_extensions/andes.c | 18 +++ drivers/perf/riscv_pmu_sbi.c | 11 +- 16 files changed, 456 insertions(+), 93 deletions(-) --- base-commit: 41c196e567fb1ea97f68a2ffb7faab451cd90854 change-id: 20240515-support_vendor_extensions-aa80120e4230 -- - Charlie