From: Palmer Dabbelt <palmer@rivosinc.com>
To: Conor Dooley <conor@kernel.org>
Cc: Conor Dooley <conor@kernel.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Palmer Dabbelt <palmer@rivosinc.com>
Subject: [PATCH] cache: StarFive: Require a 64-bit system
Date: Fri, 19 Jul 2024 09:38:41 -0700 [thread overview]
Message-ID: <20240719163841.19018-1-palmer@rivosinc.com> (raw)
From: Palmer Dabbelt <palmer@rivosinc.com>
This has a bunch of {read,write}q() calls, so it won't work on 32-bit
systems. I don't think there's any 32-bit StarFive systems, so for now
just require 64-bit.
Fixes: cabff60ca77d ("cache: Add StarFive StarLink cache management")
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
---
drivers/cache/Kconfig | 1 +
drivers/cache/starfive_starlink_cache.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/cache/Kconfig b/drivers/cache/Kconfig
index 94abd8f632a7..db51386c663a 100644
--- a/drivers/cache/Kconfig
+++ b/drivers/cache/Kconfig
@@ -18,6 +18,7 @@ config STARFIVE_STARLINK_CACHE
bool "StarFive StarLink Cache controller"
depends on RISCV
depends on ARCH_STARFIVE
+ depends on 64BIT
select RISCV_DMA_NONCOHERENT
select RISCV_NONSTANDARD_CACHE_OPS
help
diff --git a/drivers/cache/starfive_starlink_cache.c b/drivers/cache/starfive_starlink_cache.c
index 24c7d078ca22..8ee9569771f8 100644
--- a/drivers/cache/starfive_starlink_cache.c
+++ b/drivers/cache/starfive_starlink_cache.c
@@ -19,7 +19,7 @@
#define STARLINK_CACHE_FLUSH_CTL 0x10
#define STARLINK_CACHE_ALIGN 0x40
-#define STARLINK_CACHE_ADDRESS_RANGE_MASK GENMASK(39, 0)
+#define STARLINK_CACHE_ADDRESS_RANGE_MASK GENMASK(39ULL, 0)
#define STARLINK_CACHE_FLUSH_CTL_MODE_MASK GENMASK(2, 1)
#define STARLINK_CACHE_FLUSH_CTL_ENABLE_MASK BIT(0)
--
2.45.2
next reply other threads:[~2024-07-20 13:35 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-19 16:38 Palmer Dabbelt [this message]
2024-07-22 15:33 ` Conor Dooley
2024-07-22 15:36 ` Conor Dooley
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