drivers/clk/thead/clk-th1520-ap.c:260:undefined reference to `__udivdi3'

[kernel test robot <lkp@intel.com>]

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   5ad7ff8738b8bd238ca899df08badb1f61bcc39e
commit: ae81b69fd2b1eb4885b352749b1fd1172e2f0f18 clk: thead: Add support for T-Head TH1520 AP_SUBSYS clocks
date:   8 days ago
config: riscv-randconfig-r005-20230829 (https://download.01.org/0day-ci/archive/20240724/202407241009.IjYZN3cz-lkp@intel.com/config)
compiler: riscv32-linux-gcc (GCC) 13.3.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240724/202407241009.IjYZN3cz-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202407241009.IjYZN3cz-lkp@intel.com/

All errors (new ones prefixed by >>):

   riscv32-linux-ld: drivers/clk/thead/clk-th1520-ap.o: in function `th1520_pll_vco_recalc_rate':
>> drivers/clk/thead/clk-th1520-ap.c:260:(.text+0x78): undefined reference to `__udivdi3'


vim +260 drivers/clk/thead/clk-th1520-ap.c

   239	
   240	static unsigned long th1520_pll_vco_recalc_rate(struct clk_hw *hw,
   241							unsigned long parent_rate)
   242	{
   243		struct ccu_pll *pll = hw_to_ccu_pll(hw);
   244		unsigned long div, mul, frac;
   245		unsigned int cfg0, cfg1;
   246		u64 rate = parent_rate;
   247	
   248		regmap_read(pll->common.map, pll->common.cfg0, &cfg0);
   249		regmap_read(pll->common.map, pll->common.cfg1, &cfg1);
   250	
   251		mul = FIELD_GET(TH1520_PLL_FBDIV, cfg0);
   252		div = FIELD_GET(TH1520_PLL_REFDIV, cfg0);
   253		if (!(cfg1 & TH1520_PLL_DSMPD)) {
   254			mul <<= TH1520_PLL_FRAC_BITS;
   255			frac = FIELD_GET(TH1520_PLL_FRAC, cfg1);
   256			mul += frac;
   257			div <<= TH1520_PLL_FRAC_BITS;
   258		}
   259		rate = parent_rate * mul;
 > 260		rate = rate / div;
   261		return rate;
   262	}
   263	

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