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Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar Subject: Re: [PATCH 5/6] drivers/thermal/exynos: add initial Exynos 850 support Date: Wed, 24 Jul 2024 17:30:36 +0200 Message-ID: <20240724153037.914681-1-m.majewski2@samsung.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrOKsWRmVeSWpSXmKPExsWy7djP87oGcgvTDN7ft7B4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi4VNLewWE49NZraY +2Uqs8X/PTvYLZ487GOzeN63j8lBwGPNvDWMHjtn3WX3WLznJZPHplWdbB53ru1h89i8pN6j b8sqRo/Pm+QCOKK4bFJSczLLUov07RK4Mr42dbEVrOKreNZ/hq2BcSp3FyMHh4SAicSSy+ld jFwcQgIrGCWmr2tg62LkBHK+MErcmZ0GkfjMKPFnx3FWkARIw925R9kgEssZJf49mM8E4bQy SezcPpEdpIpNwEDiwZtlYLaIgJ7Eupmv2EGKmAU2s0hceDoTbJSwQKDE+TVNLCA2i4CqxPG3 38F28wrYSmza+5IFYp28RO/+PiYQmxOo/vvs5ywQNYISJ2c+AbOZgWqat85mhqifzCnR89Ie wnaRWN55nxHCFpZ4dXwLO4QtI/F/53wmCDtfYsbm9yyQsKiQuHvQC8K0lvh4hhnEZBbQlFi/ Sx+i2FFi17IGJogKPokbbwUh9vNJTNo2nRkizCvR0SYEUQ300p5JUGdJSzxpuQ210kOiY9Jm lgmMirOQfDILySezEPYuYGRexSieWlqcm55abJiXWq5XnJhbXJqXrpecn7uJEZjWTv87/mkH 49xXH/UOMTJxMB5ilOBgVhLhffJqbpoQb0piZVVqUX58UWlOavEhRmkOFiVxXtUU+VQhgfTE ktTs1NSC1CKYLBMHp1QD02Lx0PLr3s+F/yRE7WzbP+ffhNKDPKXKYmwcXYwV/HtSbvQyev2e Edm/ICFYvevQx4/sf0wPvVky/efqnoL72a6T3i+7yOOw4sVN9WmX9US69cNKtkxz/92i8qhb TfejgIL5nPQejp9W9k49uw7ddXz/eNKkFVMW5qqoKUa/qooqC7hd5dC3z1Lmsc9OFytL/p+i jQX/nGc6N0z8VMjV6FfDL6n4bdEXa0PlRRc3xS7SKV/F6tuy8+6Keztnav4Q0/6bLRC/ZsWt CJV3i2ZUxa08ftxZd730X8+gD+cDNfge823c1WDA6Pg9hO/L5y6Hj+evqPRo+c1LMVTiOPV1 iwrfrtfcMvcvWqeW8QnuVGIpzkg01GIuKk4EAG59KWXaAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrNIsWRmVeSWpSXmKPExsVy+t/xu7oGcgvTDOY/lLZ4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi4VNLewWE49NZraY +2Uqs8X/PTvYLZ487GOzeN63j8lBwGPNvDWMHjtn3WX3WLznJZPHplWdbB53ru1h89i8pN6j b8sqRo/Pm+QCOKL0bIryS0tSFTLyi0tslaINLYz0DC0t9IxMLPUMjc1jrYxMlfTtbFJSczLL Uov07RL0Mr42dbEVrOKreNZ/hq2BcSp3FyMnh4SAicTduUfZuhi5OIQEljJKzFl9kBEiIS1x +MsUdghbWOLPtS6oomYmiXU/LrCBJNgEDCQevFkGViQioCexbuYrdpAiZoGDLBJ9r68wgySE Bfwlvl9oZwGxWQRUJY6//Q7WzCtgK7Fp70sWiA3yEr37+5hAbE6BQInvs5+DxYUEeCRebdjP CFEvKHFy5hOwODNQffPW2cwTGAVmIUnNQpJawMi0ilEktbQ4Nz232FCvODG3uDQvXS85P3cT IzAWtx37uXkH47xXH/UOMTJxMB5ilOBgVhLhffJqbpoQb0piZVVqUX58UWlOavEhRlOguycy S4km5wOTQV5JvKGZgamhiZmlgamlmbGSOK9nQUeikEB6YklqdmpqQWoRTB8TB6dUA1Mpg3X0 Fq+MD9Fxcz2tLkzljXq/KsxddaNo/prevfxLanLNxQyt4g8tTDYI2pOp3et+al/zf89HVmdM P1yLZdIXSheUPr27+/nSQ2K5Ie+LVzFPqN354PadhZ9uxi9beOvrvFlVwhXXL2bcnG9zITqn nGv7L5YbOTVz8lRunXdsrlvV67+vYLGDikjhHr3Abc8ilk7Revdlfnhpqsbj0C8PfDclz5qh Iz+1Y/McYx5+jSerNWeqtZt86eGPD1Obe+HBqnKVorMNZ70Xf9PX21BcVel7sNMiv7e/Mrvk jf1zQfZ/WtMmh6//fZ5J5PFPl4Jdje+Wd9TeZC5yuRTG/a+7ZNfjg6ETrVSKdHdPPqLEUpyR aKjFXFScCADGboBITgMAAA== X-CMS-MailID: 20240724153056eucas1p193056deacd26701e60519fa0466269f5 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-RootMTR: 20240724153056eucas1p193056deacd26701e60519fa0466269f5 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20240724153056eucas1p193056deacd26701e60519fa0466269f5 References: > It feels like there is an error for Exynos7 case there. Take a look at > this commit: > > aef27b658b43 ("thermal: exynos: use sanitize_temp_error() in > exynos7_tmu_initialize()") > > I think that commit just forgets to update the shift value for Exynos7 > properly. This code: > > data->temp_error1 = trim_info & tmu_temp_mask; > data->temp_error2 = ((trim_info >> EXYNOS_TRIMINFO_85_SHIFT) & > EXYNOS_TMU_TEMP_MASK); > > in case of Exynos7 becomes: > > data->temp_error1 = trim_info & 0x1ff; // mask = 9 bits > data->temp_error2 = (trim_info >> 8) & 0xff; > > it contradicts itself, because it takes 9 rightmost bits for error1, > and then uses 1 of those bits for error2 too. It's obvious that if 9 > bits are already used for error1, then for error2 it has to be shifted > by 9 bits, not 8. > > That's why I think your patch 2/6 is legit and useful on its own, and > it's actually a good catch on your part! But the shift value has to be > fixed as well (for Exynos7). It's not ideal you don't have the > hardware to test it, but it just screams *bug* to me :) Also, maybe we > can ask someone who has Exynos7 hardware to test it for us? I thought about it for a bit and finally realized that Exynos7 only supports one point trimming. That is why in that commit, the original exynos7_tmu_initialize did not do anything with temp_error2. So temp_error2 will never be used in Exynos7. The real "fix" I guess is to only calculate temp_error2 if two point trimming is used, which is possible with a very small reordering of exynos7_tmu_initialize. But then the shift value will never be reachable in Exynos7 anyway. What do you think about this? I feel like it's worth it to change the shift value just because the code is a bit confusing anyway.