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Tue, 13 Aug 2024 10:01:32 -0700 (PDT) Received: from ziepe.ca ([128.77.69.90]) by smtp.gmail.com with ESMTPSA id af79cd13be357-7a4c7d7122bsm354386885a.40.2024.08.13.10.01.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Aug 2024 10:01:31 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.95) (envelope-from ) id 1sdutm-008ZLC-Ba; Tue, 13 Aug 2024 14:01:30 -0300 Date: Tue, 13 Aug 2024 14:01:30 -0300 From: Jason Gunthorpe To: Mostafa Saleh Cc: linux-kernel@vger.kernel.org, iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, will@kernel.org, robin.murphy@arm.com, joro@8bytes.org, nicolinc@nvidia.com, mshavit@google.com Subject: Re: [PATCH 1/2] iommu/arm-smmu-v3: Match Stall behaviour for S2 Message-ID: <20240813170130.GM1985367@ziepe.ca> References: <20240812205255.97781-1-smostafa@google.com> <20240812205255.97781-2-smostafa@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240812205255.97781-2-smostafa@google.com> On Mon, Aug 12, 2024 at 08:52:54PM +0000, Mostafa Saleh wrote: > S2S must be set when stall model is forced "ARM_SMMU_FEAT_STALL_FORCE". > But at the moment the driver ignores that, instead of doing the minimum > and only set S2S for “ARM_SMMU_FEAT_STALL_FORCE” we can just match what > S1 does which also set it for “ARM_SMMU_FEAT_STALL” and the master > has requested stalls. > This makes the driver more consistent when running on different SMMU > instances with different supported stages. > > Signed-off-by: Mostafa Saleh > --- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 5 +++++ > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 + > 2 files changed, 6 insertions(+) > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > index a31460f9f3d4..8d573d9ca93c 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -1562,6 +1562,11 @@ void arm_smmu_make_cdtable_ste(struct arm_smmu_ste *target, > (cd_table->cdtab_dma & STRTAB_STE_0_S1CTXPTR_MASK) | > FIELD_PREP(STRTAB_STE_0_S1CDMAX, cd_table->s1cdmax)); > > + /* S2S is ignored if stage-2 exists but not enabled. */ > + if (master->stall_enabled && > + smmu->features & ARM_SMMU_FEAT_TRANS_S2) > + target->data[0] |= FIELD_PREP(STRTAB_STE_2_S2S, 1); The style semes to be to just use target->data[] |= STRTAB_xx For single bit, not FIELD_PREP, even though it does work. And as Robin noted it is data[2], the naming is supposed to make that apparent with _2_ indicating the word.. But it is quite easy to make this typo. Jason