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Wed, 14 Aug 2024 15:27:28 -0700 (PDT) X-Google-Smtp-Source: AGHT+IH0XnB3zAv8wIE4zKw7V690F2HnrtkA+wzWRAYAy01bH2r2yleRktwbE5PM1Fe9xVttrUfSjg== X-Received: by 2002:a05:6e02:1546:b0:398:36c0:7968 with SMTP id e9e14a558f8ab-39d124412abmr55042975ab.6.1723674448610; Wed, 14 Aug 2024 15:27:28 -0700 (PDT) Received: from redhat.com ([38.15.36.11]) by smtp.gmail.com with ESMTPSA id e9e14a558f8ab-39d1ead55aasm662305ab.13.2024.08.14.15.27.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Aug 2024 15:27:27 -0700 (PDT) Date: Wed, 14 Aug 2024 16:27:26 -0600 From: Alex Williamson To: Lu Baolu Cc: Joerg Roedel , Will Deacon , Jacob Pan , iommu@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH 6/7] iommu/vt-d: Add helper to flush caches for context change Message-ID: <20240814162726.5efe1a6e.alex.williamson@redhat.com> In-Reply-To: <20240702130839.108139-7-baolu.lu@linux.intel.com> References: <20240702130839.108139-1-baolu.lu@linux.intel.com> <20240702130839.108139-7-baolu.lu@linux.intel.com> X-Mailer: Claws Mail 4.3.0 (GTK 3.24.43; x86_64-redhat-linux-gnu) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Hi Baolu, This appears to be non-functional and breaks device assignment... On Tue, 2 Jul 2024 21:08:38 +0800 Lu Baolu wrote: > diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c > index 1f0d6892a0b6..e84b0fdca107 100644 > --- a/drivers/iommu/intel/iommu.c > +++ b/drivers/iommu/intel/iommu.c ... > @@ -1959,7 +1944,6 @@ static void domain_context_clear_one(struct device_domain_info *info, u8 bus, u8 > { > struct intel_iommu *iommu = info->iommu; > struct context_entry *context; > - u16 did_old; > > spin_lock(&iommu->lock); > context = iommu_context_addr(iommu, bus, devfn, 0); > @@ -1968,24 +1952,10 @@ static void domain_context_clear_one(struct device_domain_info *info, u8 bus, u8 > return; > } > > - did_old = context_domain_id(context); > - static inline int context_domain_id(struct context_entry *c) { return((c->hi >> 8) & 0xffff); } > context_clear_entry(context); static inline void context_clear_entry(struct context_entry *context) { context->lo = 0; context->hi = 0; } > __iommu_flush_cache(iommu, context, sizeof(*context)); > spin_unlock(&iommu->lock); > - iommu->flush.flush_context(iommu, > - did_old, > - (((u16)bus) << 8) | devfn, > - DMA_CCMD_MASK_NOBIT, > - DMA_CCMD_DEVICE_INVL); > - > - iommu->flush.flush_iotlb(iommu, > - did_old, > - 0, > - 0, > - DMA_TLB_DSI_FLUSH); > - > - __iommu_flush_dev_iotlb(info, 0, MAX_AGAW_PFN_WIDTH); > + intel_context_flush_present(info, context, true); > } > > static int domain_setup_first_level(struct intel_iommu *iommu, > diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c > index aabcdf756581..d6623d2c2050 100644 > --- a/drivers/iommu/intel/pasid.c > +++ b/drivers/iommu/intel/pasid.c ... > +void intel_context_flush_present(struct device_domain_info *info, > + struct context_entry *context, > + bool flush_domains) > +{ > + struct intel_iommu *iommu = info->iommu; > + u16 did = context_domain_id(context); Whoops, did is always zero here, intel_context_flush_present() precedes all callers. > + struct pasid_entry *pte; > + int i; > + > + /* > + * Device-selective context-cache invalidation. The Domain-ID field > + * of the Context-cache Invalidate Descriptor is ignored by hardware > + * when operating in scalable mode. Therefore the @did value doesn't > + * matter in scalable mode. > + */ > + iommu->flush.flush_context(iommu, did, PCI_DEVID(info->bus, info->devfn), ^^^ Bogus > + DMA_CCMD_MASK_NOBIT, DMA_CCMD_DEVICE_INVL); > + > + /* > + * For legacy mode: > + * - Domain-selective IOTLB invalidation > + * - Global Device-TLB invalidation to all affected functions > + */ > + if (!sm_supported(iommu)) { > + iommu->flush.flush_iotlb(iommu, did, 0, 0, DMA_TLB_DSI_FLUSH); ^^^ etc... > + __context_flush_dev_iotlb(info); > + > + return; > + } Thanks, Alex