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From: Jason Gunthorpe <jgg@ziepe.ca>
To: Lu Baolu <baolu.lu@linux.intel.com>
Cc: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Kevin Tian <kevin.tian@intel.com>, Yi Liu <yi.l.liu@intel.com>,
	iommu@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/1] iommu/vt-d: Move PCI PASID enablement to probe path
Date: Mon, 19 Aug 2024 09:29:44 -0300	[thread overview]
Message-ID: <20240819122944.GT3468552@ziepe.ca> (raw)
In-Reply-To: <20240819051805.116936-1-baolu.lu@linux.intel.com>

On Mon, Aug 19, 2024 at 01:18:05PM +0800, Lu Baolu wrote:
> Currently, PCI PASID is enabled alongside PCI ATS when an iommu domain is
> attached to the device and disabled when the device transitions to block
> translation mode. This approach is inappropriate as PCI PASID is a device
> feature independent of the type of the attached domain.
> 
> Enable PCI PASID during the IOMMU device probe and disables it during the
> release path.
> 
> Suggested-by: Yi Liu <yi.l.liu@intel.com>
> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
> Reviewed-by: Yi Liu <yi.l.liu@intel.com>
> ---
>  drivers/iommu/intel/iommu.c | 29 +++++++++++++++--------------
>  1 file changed, 15 insertions(+), 14 deletions(-)
> 
> Change log:
> v2:
>  - Move pasid enablement the last step in intel_iommu_probe_device().
>  - Clear pasid enabled flags after pci_disable_pasid().

Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>

Jason

  parent reply	other threads:[~2024-08-19 12:29 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-19  5:18 Lu Baolu
2024-08-19  7:43 ` Yi Liu
2024-08-19 12:29 ` Jason Gunthorpe [this message]
2024-09-02  2:37 ` Baolu Lu

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