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AJvYcCU2F3lA3IQZz3VZmayZCUeuWkzKG+qg+RCrv0WeBhIrzQL0NOWsQA9+TTRDKrRNw1FuPPcR1FS1fcp/+nY=@vger.kernel.org X-Gm-Message-State: AOJu0Yx78UlUfNm3mOMFkE9WmPa7Ti9Edf4Q8VhljsWKFetieull7mgW VLCF+9UE2eYr1/edNhnngXLGFzYkIRWd6U2eoY0eiOr/yIQEq1Gc2pF/RzXNwOM= X-Google-Smtp-Source: AGHT+IHjm7Q+JoZgcM2Zph/tZNRKj+q2DW0doo5EcFiHyW+jdSlZaqVjNw0PmuMr+kvtWO0dxJNqxw== X-Received: by 2002:a17:907:d3c7:b0:a7a:ab1a:2d64 with SMTP id a640c23a62f3a-a866f9d2811mr428685466b.58.1724333213916; Thu, 22 Aug 2024 06:26:53 -0700 (PDT) Received: from localhost.localdomain ([89.47.253.130]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a868f4365a9sm119497766b.125.2024.08.22.06.26.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Aug 2024 06:26:53 -0700 (PDT) From: James Clark To: irogers@google.com, linux-perf-users@vger.kernel.org Cc: James Clark , John Garry , Will Deacon , Mike Leach , Leo Yan , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Adrian Hunter , "Liang, Kan" , Weilin Wang , Athira Rajeev , Dominique Martinet , Colin Ian King , Yang Jihong , Ze Gao , Yunseong Kim , Jing Zhang , Sun Haiyong , Yicong Yang , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 4/7] perf evsel x86: Make evsel__has_perf_metrics work for legacy events Date: Thu, 22 Aug 2024 14:24:48 +0100 Message-Id: <20240822132506.1468090-5-james.clark@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240822132506.1468090-1-james.clark@linaro.org> References: <20240822132506.1468090-1-james.clark@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Ian Rogers Use PMU interface to better detect core PMU for legacy events. Look for slots event on core PMU if it is appropriate for the event. Signed-off-by: Ian Rogers Signed-off-by: James Clark --- tools/perf/arch/x86/util/evsel.c | 31 ++++++++++++++++++++++++++----- 1 file changed, 26 insertions(+), 5 deletions(-) diff --git a/tools/perf/arch/x86/util/evsel.c b/tools/perf/arch/x86/util/evsel.c index 090d0f371891..1eaae8819c5e 100644 --- a/tools/perf/arch/x86/util/evsel.c +++ b/tools/perf/arch/x86/util/evsel.c @@ -21,7 +21,8 @@ void arch_evsel__set_sample_weight(struct evsel *evsel) /* Check whether the evsel's PMU supports the perf metrics */ bool evsel__sys_has_perf_metrics(const struct evsel *evsel) { - const char *pmu_name = evsel->pmu_name ? evsel->pmu_name : "cpu"; + struct perf_pmu *pmu; + u32 type = evsel->core.attr.type; /* * The PERF_TYPE_RAW type is the core PMU type, e.g., "cpu" PMU @@ -31,11 +32,31 @@ bool evsel__sys_has_perf_metrics(const struct evsel *evsel) * Checking both the PERF_TYPE_RAW type and the slots event * should be good enough to detect the perf metrics feature. */ - if ((evsel->core.attr.type == PERF_TYPE_RAW) && - perf_pmus__have_event(pmu_name, "slots")) - return true; +again: + switch (type) { + case PERF_TYPE_HARDWARE: + case PERF_TYPE_HW_CACHE: + type = evsel->core.attr.config >> PERF_PMU_TYPE_SHIFT; + if (type) + goto again; + break; + case PERF_TYPE_RAW: + break; + default: + return false; + } + + pmu = evsel->pmu; + if (pmu == &perf_pmu__fake) + pmu = NULL; - return false; + if (!pmu) { + while ((pmu = perf_pmus__scan_core(pmu)) != NULL) { + if (pmu->type == PERF_TYPE_RAW) + break; + } + } + return pmu && perf_pmu__have_event(pmu, "slots"); } bool arch_evsel__must_be_in_group(const struct evsel *evsel) -- 2.34.1