From: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
To: patrick@stwcx.xyz, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
Andrew Jeffery <andrew@codeconstruct.com.au>
Cc: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: [PATCH v14 07/31] ARM: dts: aspeed: yosemite4: Add gpio pca9506
Date: Mon, 26 Aug 2024 14:23:41 +0800 [thread overview]
Message-ID: <20240826062408.2885174-8-Delphine_CC_Chiu@wiwynn.com> (raw)
In-Reply-To: <20240826062408.2885174-1-Delphine_CC_Chiu@wiwynn.com>
Add gpio pca9506 I/O expander for yv4 use
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 252 ++++++++++++++++++
1 file changed, 252 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 7b79fcd77c8c..f4d27f1ffdb8 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -175,6 +175,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -193,6 +221,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -211,6 +267,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -229,6 +313,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -247,6 +359,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -265,6 +405,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -283,6 +451,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -301,6 +497,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -690,6 +914,34 @@ ipmb@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
i2c-protocol;
};
+
+ gpio@20 {
+ compatible = "nxp,pca9506";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
&i2c14 {
--
2.25.1
next prev parent reply other threads:[~2024-08-26 6:24 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 01/31] ARM: dts: aspeed: yosemite4: Revise i2c-mux devices Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 02/31] ARM: dts: aspeed: yosemite4: Enable adc15 Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 03/31] ARM: dts: aspeed: yosemite4: Enable spi-gpio setting Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 04/31] ARM: dts: aspeed: yosemite4: Enable watchdog2 Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 05/31] ARM: dts: aspeed: yosemite4: Revise quad mode to dual mode Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 06/31] ARM: dts: aspeed: yosemite4: Revise power sensor adm1281 for schematic change Delphine CC Chiu
2024-08-26 6:23 ` Delphine CC Chiu [this message]
2024-08-26 6:23 ` [PATCH v14 08/31] ARM: dts: aspeed: yosemite4: Remove space for adm1272 compatible Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 09/31] ARM: dts: aspeed: yosemite4: Enable interrupt setting for pca9555 Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 10/31] ARM: dts: aspeed: yosemite4: Add power sensor for power module reading Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 11/31] ARM: dts: aspeed: yosemite4: Add eeprom for yosemite4 use Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 12/31] ARM: dts: aspeed: yosemite4: Remove temperature sensor for yosemite4 schematic change Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 13/31] ARM: dts: aspeed: yosemite4: Revise adc128d818 adc mode " Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 14/31] ARM: dts: aspeed: yosemite4: Revise ina233 config " Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 15/31] ARM: dts: aspeed: yosemite4: Remove idle state setting for yosemite4 NIC connection Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 16/31] ARM: dts: aspeed: yosemite4: Initialize bmc gpio state Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 17/31] ARM: dts: aspeed: yosemite4: Revise mx31790 fan tach config Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 18/31] ARM: dts: aspeed: yosemite4: add mctp config for NIC Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 19/31] ARM: dts: aspeed: yosemite4: support mux to cpld Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 20/31] ARM: dts: aspeed: yosemite4: support medusa board adc sensors Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 21/31] ARM: dts: aspeed: yosemite4: support NIC eeprom Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 22/31] ARM: dts: aspeed: yosemite4: Revise i2c duty-cycle Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 23/31] ARM: dts: aspeed: yosemite4: add fan led config Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 24/31] ARM: dts: aspeed: yosemite4: add XDP710 Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 25/31] ARM: dts: aspeed: yosemite4: add RTQ6056 support Delphine CC Chiu
2024-08-26 6:24 ` [PATCH v14 26/31] ARM: dts: aspeed: yosemite4: add MP5990 support Delphine CC Chiu
2024-08-26 6:24 ` [PATCH v14 27/31] ARM: dts: aspeed: yosemite4: Adjust ioexp bus and remove mctp driver Delphine CC Chiu
2024-08-26 6:24 ` [PATCH v14 28/31] ARM: dts: aspeed: yosemite4: fix GPIO linename typo Delphine CC Chiu
2024-08-26 6:24 ` [PATCH v14 29/31] ARM: dts: aspeed: yosemitet4: add RTQ6056 support on 11 (0x41) Delphine CC Chiu
2024-08-26 6:24 ` [PATCH v14 30/31] ARM: dts: aspeed: yosemite4: add SQ52205 support Delphine CC Chiu
2024-08-26 6:24 ` [PATCH v14 31/31] ARM: dts: aspeed: yosemite4: add GPIO I6 Delphine CC Chiu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240826062408.2885174-8-Delphine_CC_Chiu@wiwynn.com \
--to=delphine_cc_chiu@wiwynn.com \
--cc=andrew@codeconstruct.com.au \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=joel@jms.id.au \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-aspeed@lists.ozlabs.org \
--cc=linux-kernel@vger.kernel.org \
--cc=patrick@stwcx.xyz \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®