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There are two SIUL2 hardware modules: SIUL2_0 and SIUL2_1. However, this driver exports both as a single GPIO driver. This is because the interrupt registers are located only in SIUL2_1, even for GPIOs that are part of SIUL2_0. There are two gaps in the GPIO ranges: - 102-111(inclusive) are invalid - 123-143(inclusive) are invalid These will be excluded via the `gpio-reserved-ranges` property. Writing and reading GPIO values is done via the PGPDO/PGPDI registers(Parallel GPIO Pad Data Output/Input) which are 16 bit registers, each bit corresponding to a GPIO. Note that the PGPDO order is similar to a big-endian grouping of two registers: PGPDO1, PGPDO0, PGPDO3, PGPDO2, PGPDO5, PGPDO4, gap, PGPDO6. I have other patches for this driver: - interrupt support - power management callbacks which I plan to upstream after this series gets merged in order to simplify the review process. Andrei Stefanescu (3): dt-bindings: gpio: add schema for NXP S32G2/S32G3 SoCs drivers: gpio: siul2-s32g2: add NXP S32G2/S32G3 SoCs support MAINTAINERS: add MAINTAINER for S32G2 SIUL2 GPIO driver .../bindings/gpio/nxp,gpio-siul2-s32g2.yaml | 134 ++++ MAINTAINERS | 2 + drivers/gpio/Kconfig | 8 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-siul2-s32g2.c | 607 ++++++++++++++++++ 5 files changed, 752 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/nxp,gpio-siul2-s32g2.yaml create mode 100644 drivers/gpio/gpio-siul2-s32g2.c -- 2.45.2