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[75.72.166.104]) by smtp.gmail.com with ESMTPSA id e9e14a558f8ab-39f3b059c32sm28466715ab.75.2024.09.02.18.31.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Sep 2024 18:31:24 -0700 (PDT) From: Adam Ford To: linux-phy@lists.infradead.org Cc: dominique.martinet@atmark-techno.com, linux-imx@nxp.com, festevam@gmail.com, frieder.schrempf@kontron.de, aford@beaconembedded.com, Sandor.yu@nxp.com, Adam Ford , Vinod Koul , Kishon Vijay Abraham I , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Lucas Stach , Marco Felsch , linux-kernel@vger.kernel.org Subject: [PATCH V4 0/5] phy: freescale: fsl-samsung-hdmi: Expand phy clock options Date: Mon, 2 Sep 2024 20:30:42 -0500 Message-ID: <20240903013113.139698-1-aford173@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Currently, there is a look-up-table to describe all the clock options the HDMI PHY can use. Some of these entries in the LUT are using a fractional divider which does not have a well documented algorithm for determinging values, but the the integer divider can use an algorithm to calculate the integer divder values dynamically beyond those listed in the LUT and also duplicates some of the entries. The first two patches do not do anything functionally other than simplify some of the register accesses and de-duplicates some of the register look-ups. The third patch adds support for the integer divider and uses it whenever the clock request is an exact match. Otherwise, it will use the LUT as before. The rouding is still based on the LUT if the integer clock isn't an exact match. The forth patch updates thes set_rate and round_rate functions to use either the fractional clock LUT or the the integer divder mechanism to determine which ever clock rate might be closest match. The last patch removes the integer divider entries from the LUT since by then it'll be comparing both the integer divider calculator and the closest value in the LUT. In my testing with a AOC 4K monitor, I was able to add 4 entries in my modetest table. I do not have an HDMI analyzer, so I just used my monitor to determine if this series worked. Adam Ford (5): phy: freescale: fsl-samsung-hdmi: Replace register defines with macro phy: freescale: fsl-samsung-hdmi: Simplify REG21_PMS_S_MASK lookup phy: freescale: fsl-samsung-hdmi: Support dynamic integer phy: freescale: fsl-samsung-hdmi: Use closest divider phy: freescale: fsl-samsung-hdmi: Remove unnecessary LUT entries drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 575 ++++++++++--------- 1 file changed, 291 insertions(+), 284 deletions(-) -- 2.43.0