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[211.75.127.162]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2054e56ef5esm39662315ad.246.2024.09.02.18.38.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Sep 2024 18:38:39 -0700 (PDT) Received: from hqs-appsw-a2o.mp600.macronix.com (linux-patcher [172.17.236.67]) by twhmp6px (Postfix) with ESMTPS id 6914680484; Tue, 3 Sep 2024 09:47:08 +0800 (CST) From: Cheng Ming Lin To: miquel.raynal@bootlin.com, vigneshr@ti.com, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: richard@nod.at, alvinzhou@mxic.com.tw, leoyu@mxic.com.tw, Cheng Ming Lin Subject: [PATCH v6 0/2] Add support for two-plane serial NAND flash Date: Tue, 3 Sep 2024 09:36:23 +0800 Message-Id: <20240903013625.1658825-1-linchengming884@gmail.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Cheng Ming Lin Add support for Macronix serial NAND flash with a two-plane structure. Insert the Plane Select bit during the read_from_cache and the write_to_cache operation. v6: Fix the name of the flag in changelog v5: Update the commit titles v4: Separate the core changes and Macronix changes v3: Add flags for the Plane Select bit Remove fixups and corresponding function v2: Squash patches 1 and 3 and come before patch 2 Cheng Ming Lin (2): mtd: spinand: Add support for setting plane select bits mtd: spinand: macronix: Flag parts needing explicit plane select drivers/mtd/nand/spi/core.c | 6 ++++++ drivers/mtd/nand/spi/macronix.c | 24 +++++++++++++++++------- include/linux/mtd/spinand.h | 2 ++ 3 files changed, 25 insertions(+), 7 deletions(-) -- 2.25.1