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Tue, 3 Sep 2024 13:20:23 +0000 (GMT) X-AuditID: cbfec7f2-bfbff70000002598-92-66d70d184bdf Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 0E.F8.19096.71D07D66; Tue, 3 Sep 2024 14:20:23 +0100 (BST) Received: from CAMSVWEXC02.scsc.local (unknown [106.1.227.72]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20240903132023eusmtip23725f57a1af6343a1273a5c5c262e453~xvof6KI0g0590805908eusmtip2I; Tue, 3 Sep 2024 13:20:23 +0000 (GMT) Received: from localhost (106.110.32.44) by CAMSVWEXC02.scsc.local (2002:6a01:e348::6a01:e348) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 3 Sep 2024 14:20:21 +0100 Date: Tue, 3 Sep 2024 15:20:18 +0200 From: Joel Granados To: Baolu Lu CC: Jason Gunthorpe , Klaus Jensen , "David Woodhouse" , Joerg Roedel , Will Deacon , Robin Murphy , Kevin Tian , Minwoo Im , , , Klaus Jensen Subject: Re: [PATCH RFC PREVIEW 0/6] iommu: enable user space iopfs in non-nested and non-svm cases Message-ID: <20240903132018.yi2xuyrp7v3npfmt@joelS2.panther.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; 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Second paragraph of section "3.4.3 Scalable Mode > > Address Translation" reads: > > " > > ... Scalable-mode context-entries support both requests-without-PASID > > and requests-with-PASID. However unlike legacy mode, in scalable-mode, > > requests-without-PASID obtain a PASID value from the RID_PASID field of > > the scalable-mode context- entry and are processed similarly to > > requests-with-PASID.Implementations not supporting RID_PASID capability > > (ECAP_REG.RPS is 0b), use a PASID value of 0 to perform address > > translation for requests without PASID. > > " > > This basically means that a default PASID is used even though the > > request is without PASID. Right? Therefore "outside PASID" means with > > the default PASID (at least in Intels case). Right? > > Kind of yes. > > The PCI specification defines the concept of PASID and its role in > transaction routing. We refer to PCI transactions with a PASID prefix as > "request-with-PASID" and those without a PASID prefix as "request- > without-PASID." Consequently, I understand 'outside PASID' to mean > transactions that do not have a PASID prefix. > > The VT-d specification describes how the IOMMU hardware handles request- > without-PASID. It uses a reserved PASID for its internal routing and > handling purposes. If RID_PASID is supported (ECAP_REG.RPS=1), software > can select its own reserved PASID. Otherwise, the IOMMU hardware will > use a default value of 0. > Thx for getting back to me. This generates another doubt in my head regarding the published capabilities from the intel IOMMU Hardware: So ecap_pasid [1] does not have to be set in scalable-mode. Right? This allows hardware supporting scalable-mode to reject transactions with PASID whenever ecap_pasid is *NOT* set; even though internally things are handled with a PASID. This question is directly related to the two last patches in the set.5/6 and 6/6. Best [1] I use ecap_pasid like in the kernel `ecap_pasid(e) (e>>40) & 0x1` -- Joel Granados