From: Thippeswamy Havalige <thippesw@amd.com>
To: <manivannan.sadhasivam@linaro.org>, <robh@kernel.org>,
<linux-pci@vger.kernel.org>, <bhelgaas@google.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <krzk+dt@kernel.org>,
<conor+dt@kernel.org>, <devicetree@vger.kernel.org>
Cc: <bharat.kumar.gogada@amd.com>, <michal.simek@amd.com>,
<lpieralisi@kernel.org>, <kw@linux.com>,
Thippeswamy Havalige <thippesw@amd.com>
Subject: [PATCH v2 0/2] Add support for CPM5 controller 1
Date: Mon, 16 Sep 2024 22:01:22 +0530 [thread overview]
Message-ID: <20240916163124.2223468-1-thippesw@amd.com> (raw)
This patch series introduces support for the second Root Port controller in
the Xilinx Versal Premium CPM5 block. The Versal Premium platform features
two Type-A Root Port controllers operating at Gen5 speed. However, the
error interrupt registers and their corresponding bits are located at
different offsets for Controller 0 and Controller 1.
To handle these differences, the series includes:
A new compatible string for the second Root Port controller in the device
tree bindings.
Driver updates to manage platform-specific interrupt registers and offsets
for both controllers using the new compatible string.
Thippeswamy Havalige (2):
dt-bindings: PCI: xilinx-cpm: Add compatible string for CPM5 host1
PCI: xilinx-cpm: Add support for Versal CPM5 Root Port controller 1
.../bindings/pci/xilinx-versal-cpm.yaml | 1 +
drivers/pci/controller/pcie-xilinx-cpm.c | 45 ++++++++++++++-----
2 files changed, 36 insertions(+), 10 deletions(-)
--
2.34.1
next reply other threads:[~2024-09-16 16:31 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-16 16:31 Thippeswamy Havalige [this message]
2024-09-16 16:31 ` [PATCH v2 1/2] dt-bindings: PCI: xilinx-cpm: Add compatible string " Thippeswamy Havalige
2024-09-17 10:49 ` Krzysztof Kozlowski
2024-09-17 12:32 ` Havalige, Thippeswamy
2024-09-17 17:50 ` Krzysztof Kozlowski
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