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[31.30.173.13]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42e969ddad1sm41992855e9.9.2024.09.26.02.47.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2024 02:47:14 -0700 (PDT) Date: Thu, 26 Sep 2024 11:47:11 +0200 From: Andrew Jones To: Nick Hu Cc: greentime.hu@sifive.com, zong.li@sifive.com, Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J. Wysocki" , Pavel Machek , Daniel Lezcano , Thomas Gleixner , Anup Patel , Mayuresh Chitale , Conor Dooley , Atish Patra , Samuel Holland , Samuel Ortiz , Sunil V L , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: Re: [PATCH v2 3/3] clocksource/drivers/timer-riscv: Stop stimecmp when cpu hotplug Message-ID: <20240926-b0d87e489410fd9f83796a71@orel> References: <20240926065422.226518-1-nick.hu@sifive.com> <20240926065422.226518-4-nick.hu@sifive.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240926065422.226518-4-nick.hu@sifive.com> On Thu, Sep 26, 2024 at 02:54:18PM GMT, Nick Hu wrote: > Stop the stimecmp when the cpu is going to be off otherwise the timer > stimecmp register while cpu non retention suspend. This commit message seems to be missing some words. The comment below reads much better. Thanks, drew > > Suggested-by: Anup Patel > Link: https://lore.kernel.org/lkml/20240829033904.477200-3-nick.hu@sifive.com/T/#u > Signed-off-by: Nick Hu > --- > drivers/clocksource/timer-riscv.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c > index 48ce50c5f5e6..166dee14e46b 100644 > --- a/drivers/clocksource/timer-riscv.c > +++ b/drivers/clocksource/timer-riscv.c > @@ -127,6 +127,12 @@ static int riscv_timer_starting_cpu(unsigned int cpu) > static int riscv_timer_dying_cpu(unsigned int cpu) > { > disable_percpu_irq(riscv_clock_event_irq); > + /* > + * Stop the timer when the cpu is going to be offline otherwise > + * the timer interrupt may be pending while performing power-down. > + */ > + riscv_clock_event_stop(); > + > return 0; > } > > -- > 2.34.1 >