From: Anshuman Khandual <anshuman.khandual@arm.com>
To: linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev,
linux-arm-kernel@lists.infradead.org, maz@kernel.org
Cc: Anshuman Khandual <anshuman.khandual@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Mark Brown <broonie@kernel.org>
Subject: [PATCH 45/47] KVM: arm64: nv: Add FEAT_FGT2 registers access from virtual EL2
Date: Tue, 1 Oct 2024 08:13:54 +0530 [thread overview]
Message-ID: <20241001024356.1096072-46-anshuman.khandual@arm.com> (raw)
In-Reply-To: <20241001024356.1096072-1-anshuman.khandual@arm.com>
This adds VNCR-capable HDFGRTR2_EL2, HDFGWTR2_EL2, HFGRTR2_EL2, HFGWTR2_EL2
and HFGITR2_EL2 FEAT_FGT2 registers into enum vcpu_sysreg, and also enables
their access from virtual EL2 environment.
Cc: Marc Zyngier <maz@kernel.org>
Cc: Oliver Upton <oliver.upton@linux.dev>
Cc: James Morse <james.morse@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: kvmarm@lists.linux.dev
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
arch/arm64/include/asm/kvm_host.h | 5 +++++
arch/arm64/include/asm/vncr_mapping.h | 5 +++++
arch/arm64/kvm/sys_regs.c | 5 +++++
3 files changed, 15 insertions(+)
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index 329619c6fa96..09291e1e42c9 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -532,6 +532,11 @@ enum vcpu_sysreg {
VNCR(HDFGWTR_EL2),
VNCR(HAFGRTR_EL2),
+ VNCR(HDFGRTR2_EL2),
+ VNCR(HDFGWTR2_EL2),
+ VNCR(HFGITR2_EL2),
+ VNCR(HFGRTR2_EL2),
+ VNCR(HFGWTR2_EL2),
VNCR(CNTVOFF_EL2),
VNCR(CNTV_CVAL_EL0),
VNCR(CNTV_CTL_EL0),
diff --git a/arch/arm64/include/asm/vncr_mapping.h b/arch/arm64/include/asm/vncr_mapping.h
index 06f8ec0906a6..8eab837196d0 100644
--- a/arch/arm64/include/asm/vncr_mapping.h
+++ b/arch/arm64/include/asm/vncr_mapping.h
@@ -38,6 +38,8 @@
#define VNCR_HFGRTR_EL2 0x1B8
#define VNCR_HFGWTR_EL2 0x1C0
#define VNCR_HFGITR_EL2 0x1C8
+#define VNCR_HDFGRTR2_EL2 0x1A0
+#define VNCR_HDFGWTR2_EL2 0x1B0
#define VNCR_HDFGRTR_EL2 0x1D0
#define VNCR_HDFGWTR_EL2 0x1D8
#define VNCR_ZCR_EL1 0x1E0
@@ -53,6 +55,9 @@
#define VNCR_PIRE0_EL2 0x298
#define VNCR_PIR_EL1 0x2A0
#define VNCR_POR_EL1 0x2A8
+#define VNCR_HFGRTR2_EL2 0x2C0
+#define VNCR_HFGWTR2_EL2 0x2C8
+#define VNCR_HFGITR2_EL2 0x310
#define VNCR_ICH_LR0_EL2 0x400
#define VNCR_ICH_LR1_EL2 0x408
#define VNCR_ICH_LR2_EL2 0x410
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index dad88e31f953..778731491f79 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -2794,9 +2794,14 @@ static const struct sys_reg_desc sys_reg_descs[] = {
EL2_REG_VNCR(VTCR_EL2, reset_val, 0),
{ SYS_DESC(SYS_DACR32_EL2), undef_access, reset_unknown, DACR32_EL2 },
+ EL2_REG_VNCR(HDFGRTR2_EL2, reset_val, 0),
+ EL2_REG_VNCR(HDFGWTR2_EL2, reset_val, 0),
+ EL2_REG_VNCR(HFGRTR2_EL2, reset_val, 0),
+ EL2_REG_VNCR(HFGWTR2_EL2, reset_val, 0),
EL2_REG_VNCR(HDFGRTR_EL2, reset_val, 0),
EL2_REG_VNCR(HDFGWTR_EL2, reset_val, 0),
EL2_REG_VNCR(HAFGRTR_EL2, reset_val, 0),
+ EL2_REG_VNCR(HFGITR2_EL2, reset_val, 0),
EL2_REG_REDIR(SPSR_EL2, reset_val, 0),
EL2_REG_REDIR(ELR_EL2, reset_val, 0),
{ SYS_DESC(SYS_SP_EL1), access_sp_el1},
--
2.25.1
next prev parent reply other threads:[~2024-10-01 2:47 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-01 2:43 [PATCH 00/47] KVM: arm64: Enable FGU (Fine Grained Undefined) for FEAT_FGT2 registers Anshuman Khandual
2024-10-01 2:43 ` [PATCH 01/47] arm64/sysreg: Update register fields for ID_AA64MMFR0_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 02/47] arm64/sysreg: Update register fields for ID_AA64DFR0_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 03/47] arm64/sysreg: Update register fields for ID_AA64PFR0_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 04/47] arm64/sysreg: Add register fields for ID_AA64DFR2_EL1 Anshuman Khandual
2024-10-02 15:48 ` Mark Brown
2024-10-03 3:48 ` Anshuman Khandual
2024-10-01 2:43 ` [PATCH 05/47] arm64/sysreg: Add register fields for HDFGRTR2_EL2 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 06/47] arm64/sysreg: Add register fields for HDFGWTR2_EL2 Anshuman Khandual
2024-10-02 16:09 ` Mark Brown
2024-10-01 2:43 ` [PATCH 07/47] arm64/sysreg: Add register fields for HFGITR2_EL2 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 08/47] arm64/sysreg: Add register fields for HFGRTR2_EL2 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 09/47] arm64/sysreg: Add register fields for HFGWTR2_EL2 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 10/47] arm64/sysreg: Add register fields for MDSELR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 11/47] arm64/sysreg: Add register fields for PMSIDR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 12/47] arm64/sysreg: Add register fields for TRBIDR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 13/47] arm64/sysreg: Add register fields for TRBMPAM_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 14/47] arm64/sysreg: Add register fields for PMSDSFR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 15/47] arm64/sysreg: Add register fields for SPMDEVAFF_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 16/47] arm64/sysreg: Add register fields for PFAR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 17/47] arm64/sysreg: Add register fields for PMIAR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 18/47] arm64/sysreg: Add register fields for PMECR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 19/47] arm64/sysreg: Add register fields for PMUACR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 20/47] arm64/sysreg: Add register fields for PMCCNTSVR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 21/47] arm64/sysreg: Add register fields for SPMSCR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 22/47] arm64/sysreg: Add register fields for SPMACCESSR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 23/47] arm64/sysreg: Add register fields for PMICNTR_EL0 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 24/47] arm64/sysreg: Add register fields for PMICFILTR_EL0 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 25/47] arm64/sysreg: Add register fields for SPMCR_EL0 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 26/47] arm64/sysreg: Add register fields for SPMOVSCLR_EL0 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 27/47] arm64/sysreg: Add register fields for SPMOVSSET_EL0 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 28/47] arm64/sysreg: Add register fields for SPMINTENCLR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 29/47] arm64/sysreg: Add register fields for SPMINTENSET_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 30/47] arm64/sysreg: Add register fields for SPMCNTENCLR_EL0 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 31/47] arm64/sysreg: Add register fields for SPMCNTENSET_EL0 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 32/47] arm64/sysreg: Add register fields for SPMSELR_EL0 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 33/47] arm64/sysreg: Add register fields for PMICNTSVR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 34/47] arm64/sysreg: Add register fields for SPMIIDR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 35/47] arm64/sysreg: Add register fields for SPMDEVARCH_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 36/47] arm64/sysreg: Add register fields for SPMCFGR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 37/47] arm64/sysreg: Add register fields for PMSSCR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 38/47] arm64/sysreg: Add register fields for PMZR_EL0 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 39/47] arm64/sysreg: Add register fields for SPMCGCR0_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 40/47] arm64/sysreg: Add register fields for SPMCGCR1_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 41/47] arm64/sysreg: Add register fields for MDSTEPOP_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 42/47] arm64/sysreg: Add register fields for ERXGSR_EL1 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 43/47] arm64/sysreg: Add register fields for SPMACCESSR_EL2 Anshuman Khandual
2024-10-01 2:43 ` [PATCH 44/47] arm64/sysreg: Add remaining debug registers affected by HDFGxTR2_EL2 Anshuman Khandual
2024-10-01 2:43 ` Anshuman Khandual [this message]
2024-10-01 2:43 ` [PATCH 46/47] KVM: arm64: nv: Add FEAT_FGT2 registers based FGU handling Anshuman Khandual
2024-10-01 2:43 ` [PATCH 47/47] KVM: arm64: nv: Add trap forwarding for FEAT_FGT2 described registers Anshuman Khandual
2024-10-01 14:46 ` Oliver Upton
2024-10-03 4:16 ` Anshuman Khandual
2024-10-04 5:01 ` Oliver Upton
2024-10-21 4:01 ` Anshuman Khandual
2024-10-02 15:52 ` [PATCH 00/47] KVM: arm64: Enable FGU (Fine Grained Undefined) for FEAT_FGT2 registers Mark Brown
2024-10-03 3:54 ` Anshuman Khandual
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