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charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20241012050611.1908-2-linux.amoon@gmail.com> On Sat, Oct 12, 2024 at 10:36:03AM +0530, Anand Moon wrote: > Refactor the clock handling in the Rockchip PCIe driver, > introducing a more robust and efficient method for enabling and > disabling clocks using clk_bulk*() API. Using the clk_bulk APIs, I think I mentioned earlier to use impreative tone in commit messages. > the clock handling for the core clocks becomes much simpler. > Could you please elaborate how? i.e., devm_clk_bulk_get_all() allows the driver to get all clocks defined in the DT thereby removing the hardcoded clock names in the driver. > - Replace devm_clk_get() with devm_clk_bulk_get_all(). > - Replace clk_prepare_enable() with clk_bulk_prepare_enable(). > - Replace clk_disable_unprepare() with clk_bulk_disable_unprepare(). > > Signed-off-by: Anand Moon With above changes, Reviewed-by: Manivannan Sadhasivam - Mani > --- > v7: Update the functional change in commmit message. > v6: None. > v5: switch to use use devm_clk_bulk_get_all()? gets rid of hardcoding the > clock names in driver. > v4: use dev_err_probe for error patch. > v3: Fix typo in commit message, dropped reported by. > v2: Fix compilation error reported by Intel test robot. > --- > drivers/pci/controller/pcie-rockchip.c | 65 +++----------------------- > drivers/pci/controller/pcie-rockchip.h | 7 ++- > 2 files changed, 10 insertions(+), 62 deletions(-) > > diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c > index c07d7129f1c7..2777ef0cb599 100644 > --- a/drivers/pci/controller/pcie-rockchip.c > +++ b/drivers/pci/controller/pcie-rockchip.c > @@ -127,29 +127,9 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip) > "failed to get ep GPIO\n"); > } > > - rockchip->aclk_pcie = devm_clk_get(dev, "aclk"); > - if (IS_ERR(rockchip->aclk_pcie)) { > - dev_err(dev, "aclk clock not found\n"); > - return PTR_ERR(rockchip->aclk_pcie); > - } > - > - rockchip->aclk_perf_pcie = devm_clk_get(dev, "aclk-perf"); > - if (IS_ERR(rockchip->aclk_perf_pcie)) { > - dev_err(dev, "aclk_perf clock not found\n"); > - return PTR_ERR(rockchip->aclk_perf_pcie); > - } > - > - rockchip->hclk_pcie = devm_clk_get(dev, "hclk"); > - if (IS_ERR(rockchip->hclk_pcie)) { > - dev_err(dev, "hclk clock not found\n"); > - return PTR_ERR(rockchip->hclk_pcie); > - } > - > - rockchip->clk_pcie_pm = devm_clk_get(dev, "pm"); > - if (IS_ERR(rockchip->clk_pcie_pm)) { > - dev_err(dev, "pm clock not found\n"); > - return PTR_ERR(rockchip->clk_pcie_pm); > - } > + rockchip->num_clks = devm_clk_bulk_get_all(dev, &rockchip->clks); > + if (rockchip->num_clks < 0) > + return dev_err_probe(dev, err, "failed to get clocks\n"); > > return 0; > } > @@ -372,39 +352,11 @@ int rockchip_pcie_enable_clocks(struct rockchip_pcie *rockchip) > struct device *dev = rockchip->dev; > int err; > > - err = clk_prepare_enable(rockchip->aclk_pcie); > - if (err) { > - dev_err(dev, "unable to enable aclk_pcie clock\n"); > - return err; > - } > - > - err = clk_prepare_enable(rockchip->aclk_perf_pcie); > - if (err) { > - dev_err(dev, "unable to enable aclk_perf_pcie clock\n"); > - goto err_aclk_perf_pcie; > - } > - > - err = clk_prepare_enable(rockchip->hclk_pcie); > - if (err) { > - dev_err(dev, "unable to enable hclk_pcie clock\n"); > - goto err_hclk_pcie; > - } > - > - err = clk_prepare_enable(rockchip->clk_pcie_pm); > - if (err) { > - dev_err(dev, "unable to enable clk_pcie_pm clock\n"); > - goto err_clk_pcie_pm; > - } > + err = clk_bulk_prepare_enable(rockchip->num_clks, rockchip->clks); > + if (err) > + return dev_err_probe(dev, err, "failed to enable clocks\n"); > > return 0; > - > -err_clk_pcie_pm: > - clk_disable_unprepare(rockchip->hclk_pcie); > -err_hclk_pcie: > - clk_disable_unprepare(rockchip->aclk_perf_pcie); > -err_aclk_perf_pcie: > - clk_disable_unprepare(rockchip->aclk_pcie); > - return err; > } > EXPORT_SYMBOL_GPL(rockchip_pcie_enable_clocks); > > @@ -412,10 +364,7 @@ void rockchip_pcie_disable_clocks(void *data) > { > struct rockchip_pcie *rockchip = data; > > - clk_disable_unprepare(rockchip->clk_pcie_pm); > - clk_disable_unprepare(rockchip->hclk_pcie); > - clk_disable_unprepare(rockchip->aclk_perf_pcie); > - clk_disable_unprepare(rockchip->aclk_pcie); > + clk_bulk_disable_unprepare(rockchip->num_clks, rockchip->clks); > } > EXPORT_SYMBOL_GPL(rockchip_pcie_disable_clocks); > > diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h > index 6111de35f84c..bebab80c9553 100644 > --- a/drivers/pci/controller/pcie-rockchip.h > +++ b/drivers/pci/controller/pcie-rockchip.h > @@ -11,6 +11,7 @@ > #ifndef _PCIE_ROCKCHIP_H > #define _PCIE_ROCKCHIP_H > > +#include > #include > #include > #include > @@ -299,10 +300,8 @@ struct rockchip_pcie { > struct reset_control *pm_rst; > struct reset_control *aclk_rst; > struct reset_control *pclk_rst; > - struct clk *aclk_pcie; > - struct clk *aclk_perf_pcie; > - struct clk *hclk_pcie; > - struct clk *clk_pcie_pm; > + struct clk_bulk_data *clks; > + int num_clks; > struct regulator *vpcie12v; /* 12V power supply */ > struct regulator *vpcie3v3; /* 3.3V power supply */ > struct regulator *vpcie1v8; /* 1.8V power supply */ > -- > 2.44.0 > -- மணிவண்ணன் சதாசிவம்