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Wed, 16 Oct 2024 23:45:17 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 49GNjGQi031586 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 16 Oct 2024 23:45:16 GMT Received: from hu-mdtipton-lv.qualcomm.com (10.49.16.6) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 16 Oct 2024 16:45:16 -0700 Date: Wed, 16 Oct 2024 16:45:15 -0700 From: Mike Tipton To: Sibi Sankar CC: , , , , , , , , , , , , Subject: Re: [PATCH V5 1/1] cpufreq: scmi: Register for limit change notifications Message-ID: <20241016234514.GA17864@hu-mdtipton-lv.qualcomm.com> References: <20240603192654.2167620-1-quic_sibis@quicinc.com> <20240603192654.2167620-2-quic_sibis@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20240603192654.2167620-2-quic_sibis@quicinc.com> User-Agent: Mutt/1.9.4 (2018-02-28) X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 7_7Zy98waBdmcNbs49DXZjcvcob6oB9b X-Proofpoint-ORIG-GUID: 7_7Zy98waBdmcNbs49DXZjcvcob6oB9b X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxlogscore=999 mlxscore=0 impostorscore=0 lowpriorityscore=0 malwarescore=0 priorityscore=1501 spamscore=0 suspectscore=0 clxscore=1011 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410160152 On Tue, Jun 04, 2024 at 12:56:54AM +0530, Sibi Sankar wrote: > Register for limit change notifications if supported and use the throttled > frequency from the notification to apply HW pressure. > > Signed-off-by: Sibi Sankar > --- > > v5: > * Drop patch 1 and use pm_qos to update constraints. [Vincent] > * Use sdev instead of cpu_dev in dev_warn. [Christian] > * Pass sdev directly through private data. [Christian] > * Dropping Rb's for now. > > drivers/cpufreq/scmi-cpufreq.c | 36 ++++++++++++++++++++++++++++++++++ > 1 file changed, 36 insertions(+) Tested-by: Mike Tipton > > diff --git a/drivers/cpufreq/scmi-cpufreq.c b/drivers/cpufreq/scmi-cpufreq.c > index b87fd127aa43..0edfa55d8e49 100644 > --- a/drivers/cpufreq/scmi-cpufreq.c > +++ b/drivers/cpufreq/scmi-cpufreq.c > @@ -16,6 +16,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -25,7 +26,9 @@ struct scmi_data { > int domain_id; > int nr_opp; > struct device *cpu_dev; > + struct cpufreq_policy *policy; > cpumask_var_t opp_shared_cpus; > + struct notifier_block limit_notify_nb; > }; > > static struct scmi_protocol_handle *ph; > @@ -174,6 +177,25 @@ static struct freq_attr *scmi_cpufreq_hw_attr[] = { > NULL, > }; > > +static int scmi_limit_notify_cb(struct notifier_block *nb, unsigned long event, void *data) > +{ > + struct scmi_data *priv = container_of(nb, struct scmi_data, limit_notify_nb); > + struct scmi_perf_limits_report *limit_notify = data; > + struct cpufreq_policy *policy = priv->policy; > + unsigned int limit_freq_khz; > + int ret; > + > + limit_freq_khz = limit_notify->range_max_freq / HZ_PER_KHZ; > + > + policy->max = clamp(limit_freq_khz, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq); > + > + ret = freq_qos_update_request(policy->max_freq_req, policy->max); > + if (ret < 0) > + pr_warn("failed to update freq constraint: %d\n", ret); This would be better as a dev_warn() with the cpu device. Other than that, looks good to me.