From: Mario Limonciello <mario.limonciello@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>,
"Dave Hansen" <dave.hansen@linux.intel.com>,
"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<x86@kernel.org>, "H . Peter Anvin" <hpa@zytor.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Gautham R . Shenoy" <gautham.shenoy@amd.com>,
Mario Limonciello <mario.limonciello@amd.com>,
Perry Yuan <perry.yuan@amd.com>,
Brijesh Singh <brijesh.singh@amd.com>,
Peter Zijlstra <peterz@infradead.org>,
Li RongQing <lirongqing@baidu.com>,
"open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<linux-kernel@vger.kernel.org>,
"open list:ACPI" <linux-acpi@vger.kernel.org>,
"open list:AMD PSTATE DRIVER" <linux-pm@vger.kernel.org>
Subject: [PATCH 2/4] x86/cpufeatures: Rename X86_FEATURE_HETERO_CORE_TOPOLOGY to X86_FEATURE_AMD_HETEROGENEOUS_CORES
Date: Mon, 21 Oct 2024 12:55:07 -0500 [thread overview]
Message-ID: <20241021175509.2079-3-mario.limonciello@amd.com> (raw)
In-Reply-To: <20241021175509.2079-1-mario.limonciello@amd.com>
X86_FEATURE_AMD_HETEROGENEOUS_CORES makes it clear this is an AMD feature
and matches the APM value of HeterogeneousCores
Suggested-by: Borislav Petkov <bp@alien8.de>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
arch/x86/include/asm/cpufeatures.h | 2 +-
arch/x86/kernel/cpu/amd.c | 2 +-
arch/x86/kernel/cpu/scattered.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 424bb7ae8914a..7f6c9fc465293 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -473,7 +473,7 @@
#define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* BHI_DIS_S HW control enabled */
#define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */
#define X86_FEATURE_AMD_FAST_CPPC (21*32 + 5) /* Fast CPPC */
-#define X86_FEATURE_HETERO_CORE_TOPOLOGY (21*32 + 6) /* Heterogeneous Core Topology */
+#define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */
/*
* BUG word(s)
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 8ad5f1385f0ec..0f533e6260d29 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -1223,7 +1223,7 @@ enum amd_core_type amd_get_core_type(void)
core_type :4;
} props;
- if (!cpu_feature_enabled(X86_FEATURE_HETERO_CORE_TOPOLOGY))
+ if (!cpu_feature_enabled(X86_FEATURE_AMD_HETEROGENEOUS_CORES))
return CPU_CORE_TYPE_NO_HETERO_SUP;
cpuid_leaf_reg(0x80000026, CPUID_EBX, &props);
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index d7f2c19abce33..307a917415343 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -52,7 +52,7 @@ static const struct cpuid_bit cpuid_bits[] = {
{ X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 },
{ X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 },
{ X86_FEATURE_AMD_LBR_PMC_FREEZE, CPUID_EAX, 2, 0x80000022, 0 },
- { X86_FEATURE_HETERO_CORE_TOPOLOGY, CPUID_EAX, 30, 0x80000026, 0 },
+ { X86_FEATURE_AMD_HETEROGENEOUS_CORES, CPUID_EAX, 30, 0x80000026, 0 },
{ 0, 0, 0, 0, 0 }
};
--
2.43.0
next prev parent reply other threads:[~2024-10-21 17:56 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-21 17:55 [PATCH 0/4] Adjustments for AMD heterogeneous designs Mario Limonciello
2024-10-21 17:55 ` [PATCH 1/4] x86/cpufeatures: Rename X86_FEATURE_FAST_CPPC to have AMD prefix Mario Limonciello
2024-10-21 17:55 ` Mario Limonciello [this message]
2024-10-21 18:17 ` [PATCH 2/4] x86/cpufeatures: Rename X86_FEATURE_HETERO_CORE_TOPOLOGY to X86_FEATURE_AMD_HETEROGENEOUS_CORES Mario Limonciello
2024-10-21 17:55 ` [PATCH 3/4] x86/cpu: Enable SD_ASYM_PACKING for PKG Domain on AMD Processors Mario Limonciello
2024-10-21 17:55 ` [PATCH 4/4] x86/amd: Move AMD core type identification code Mario Limonciello
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