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[88.11.182.158]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43193573d47sm123144845e9.3.2024.10.28.13.36.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2024 13:36:44 -0700 (PDT) From: Sergio Paracuellos To: linux-mips@vger.kernel.org Cc: daniel.lezcano@linaro.org, tglx@linutronix.de, tsbogend@alpha.franken.de, john@phrozen.org, linux-kernel@vger.kernel.org, yangshiji66@outlook.com Subject: [PATCH v2 0/1] clocksource: move System Tick Counter from 'arch/mips/ralink' Date: Mon, 28 Oct 2024 21:36:42 +0100 Message-Id: <20241028203643.191268-1-sergio.paracuellos@gmail.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Hi Daniel, System Tick Counter is present in RT3352 and MT7620 Ralink SoCs. This driver has been in 'arch/mips/ralink' from the beggining and can be easily moved into a more accurate place in 'drivers/clocksource' folder. This makes easier to enable it for compile test targets as well as reduce LOC in architecture specific folders. Bindings are already mainlined and can be located here [0]. Thanks in advance for your time. Best regards, Sergio Paracuellos [0]: https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/timer/ralink,cevt-systick.yaml Changes in v2: - Address requested changes from Daniel's review in v1: - Squash two previous patches in one to perform a git mv. - Change Kconfig option into more accurate RALINK_TIMER. - Avoid 'default' option in RALINK_TIMER option. Sergio Paracuellos (1): clocksource: Add Ralink System Tick Counter driver arch/mips/ralink/Kconfig | 7 ------- arch/mips/ralink/Makefile | 2 -- drivers/clocksource/Kconfig | 9 +++++++++ drivers/clocksource/Makefile | 1 + .../clocksource/timer-ralink.c | 11 ++++------- 5 files changed, 14 insertions(+), 16 deletions(-) rename arch/mips/ralink/cevt-rt3352.c => drivers/clocksource/timer-ralink.c (91%) -- 2.25.1