From: Potin Lai <potin.lai.pt@gmail.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Joel Stanley <joel@jms.id.au>,
Andrew Jeffery <andrew@codeconstruct.com.au>,
Patrick Williams <patrick@stwcx.xyz>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org,
Potin Lai <potin.lai@quantatw.com>,
Cosmo Chou <cosmo.chou@quantatw.com>,
Potin Lai <potin.lai.pt@gmail.com>
Subject: [PATCH v2 2/2] ARM: dts: aspeed: catalina: add hdd board cpld ioexp
Date: Thu, 07 Nov 2024 20:39:58 +0800 [thread overview]
Message-ID: <20241107-catalina-cpld-ioexp-update-v2-2-d7742eabc0e6@gmail.com> (raw)
In-Reply-To: <20241107-catalina-cpld-ioexp-update-v2-0-d7742eabc0e6@gmail.com>
Add HDD board CPLD IO expender based on latest DVT HDD board CPLD
firmware implementation.
Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
---
.../dts/aspeed/aspeed-bmc-facebook-catalina.dts | 65 ++++++++++++++++++++++
1 file changed, 65 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts
index 10a9fca1b803..102d71234932 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts
@@ -632,6 +632,36 @@ eeprom@51 {
&i2c3 {
status = "okay";
+
+ // HDD CPLD IOEXP 0x10
+ io_expander13: gpio@10 {
+ compatible = "nxp,pca9555";
+ interrupt-parent = <&gpio0>;
+ interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
+ reg = <0x10>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ // HDD CPLD IOEXP 0x11
+ io_expander14: gpio@11 {
+ compatible = "nxp,pca9555";
+ interrupt-parent = <&gpio0>;
+ interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
+ reg = <0x11>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ // HDD CPLD IOEXP 0x12
+ io_expander15: gpio@12 {
+ compatible = "nxp,pca9555";
+ interrupt-parent = <&gpio0>;
+ interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
+ reg = <0x12>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
&i2c4 {
@@ -1067,3 +1097,38 @@ &io_expander12 {
"PRSNT_CHASSIS1_LEAK_CABLE_R_N","PRSNT_CHASSIS0_LEAK_CABLE_R_N";
};
+&io_expander13 {
+ gpio-line-names =
+ "wP3V3_RUNTIME_FLT_HDD0","wP12V_RUNTIME_FLT_HDD0",
+ "wP3V3_AUX_RUNTIME_FLT_HDD0","",
+ "Host_PERST_SEQPWR_FLT_HDD0","wP3V3_SEQPWR_FLT_HDD0",
+ "wP12V_SEQPWR_FLT_HDD0","wP3V3_AUX_SEQPWR_FLT_HDD0",
+ "wP3V3_RUNTIME_FLT_HDD1","wP12V_RUNTIME_FLT_HDD1",
+ "wP3V3_AUX_RUNTIME_FLT_HDD1","",
+ "Host_PERST_SEQPWR_FLT_HDD1","wP3V3_SEQPWR_FLT_HDD1",
+ "wP12V_SEQPWR_FLT_HDD1","wP3V3_AUX_SEQPWR_FLT_HDD1";
+};
+
+&io_expander14 {
+ gpio-line-names =
+ "wP3V3_RUNTIME_FLT_HDD2","wP12V_RUNTIME_FLT_HDD2",
+ "wP3V3_AUX_RUNTIME_FLT_HDD2","",
+ "Host_PERST_SEQPWR_FLT_HDD2","wP3V3_SEQPWR_FLT_HDD2",
+ "wP12V_SEQPWR_FLT_HDD2","wP3V3_AUX_SEQPWR_FLT_HDD2",
+ "wP3V3_RUNTIME_FLT_HDD3","wP12V_RUNTIME_FLT_HDD3",
+ "wP3V3_AUX_RUNTIME_FLT_HDD3","",
+ "Host_PERST_SEQPWR_FLT_HDD3","wP3V3_SEQPWR_FLT_HDD3",
+ "wP12V_SEQPWR_FLT_HDD3","wP3V3_AUX_SEQPWR_FLT_HDD3";
+};
+
+&io_expander15 {
+ gpio-line-names =
+ "P3V3_HDD3_FAULT_R","P3V3_HDD2_FAULT_R",
+ "P3V3_HDD1_FAULT_R","P3V3_HDD0_FAULT_R",
+ "P12V_HDD3_FLT_L","P12V_HDD2_FLT_L",
+ "P12V_HDD1_FLT_L","P12V_HDD0_FLT_L",
+ "HDD_23_PWRBRK_N_R","HDD_01_PWRBRK_N_R",
+ "","",
+ "HDD3_PRSNT_N_R","HDD2_PRSNT_N_R",
+ "HDD1_PRSNT_N_R","HDD0_PRSNT_N_R";
+};
--
2.31.1
prev parent reply other threads:[~2024-11-07 12:42 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-07 12:39 [PATCH v2 0/2] ARM: dts: aspeed: catalina: update CPLD IO expander pin definitions Potin Lai
2024-11-07 12:39 ` [PATCH v2 1/2] ARM: dts: aspeed: catalina: update pdb board cpld ioexp linename Potin Lai
2024-11-07 23:39 ` Andrew Jeffery
2024-11-07 12:39 ` Potin Lai [this message]
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