From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-sh.amlogic.com (unknown [58.32.228.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9CF511DDA32; Fri, 8 Nov 2024 08:38:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=58.32.228.46 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731055110; cv=none; b=VLaZgBRsrE0IAfbrTqd163i0d0K7RaIbW8+tmjDD9rwoP+UO9M8IrKXSeJkEw8Iy7MUGgcT2Z65bhHZGfWF+od9cf7hjCZNz0gTFW4eM1ge2/uefJA9hm1vPy3b/+ik/t3Qbl4My5Ge8wYLbj8I1+HXBgUDiZoytfLPAd0ZvDVg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731055110; c=relaxed/simple; bh=9VjzPSmxTbRR9nN742Qok+POFXljNbPly0HWhmf3Tp0=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=CaohAKO/xmbkb030cu7mw+PBt41mkRxLSpqsJiLlmoPiqR02H5yo0QDI+1gxiVmHEjopDd6Vx3r7nrBH1B3HTa8BGb6NDs/o/u7uP39LrmGGFb9jbi7muupRHvuBD9PdmTlZs0194hlbPH2RMHaAstVilpNEnCSKfNFsEM6Ck4M= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amlogic.com; spf=pass smtp.mailfrom=amlogic.com; arc=none smtp.client-ip=58.32.228.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amlogic.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amlogic.com Received: from droid10-sz.amlogic.com (10.28.11.69) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.39; Fri, 8 Nov 2024 16:23:07 +0800 From: zelong dong To: Neil Armstrong , Philipp Zabel , Kevin Hilman , Rob Herring , Martin Blumenstingl , Jerome Brunet , Krzysztof Kozlowski CC: , , , , , Zelong Dong Subject: [PATCH v3 0/3 RESEND] reset: amlogic-a4/a5: add reset driver Date: Fri, 8 Nov 2024 16:23:00 +0800 Message-ID: <20241108082303.25207-1-zelong.dong@amlogic.com> X-Mailer: git-send-email 2.35.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain From: Zelong Dong This patchset adds Reset controller driver support for Amlogic A4/A5 SoC. The RESET registers count and offset for A4/A5 Soc are same as S4 Soc. Changes since v2: - rebase on 'amlogic,t7-reset' patchset Changes since v1: - remove 'amlogic,t7-reset' - move 'amlogic,c3-reset' to the other enum list - move reset node from amlogic-a4-common.dtsi to amlogic-a4.dtsi/amlogic-a5.dtsi --- v1:https://lore.kernel.org/all/20240703061610.37217-1-zelong.dong@amlogic.com/ v2:https://lore.kernel.org/all/20240715051217.5286-1-zelong.dong@amlogic.com/ Zelong Dong (3): dt-bindings: reset: Add compatible for Amlogic A4/A5 Reset Controller arm64: dts: amlogic: Add Amlogic A4 reset controller arm64: dts: amlogic: Add Amlogic A5 reset controller .../bindings/reset/amlogic,meson-reset.yaml | 23 +++-- .../arm64/boot/dts/amlogic/amlogic-a4-reset.h | 93 ++++++++++++++++++ arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 10 ++ .../arm64/boot/dts/amlogic/amlogic-a5-reset.h | 95 +++++++++++++++++++ arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi | 10 ++ 5 files changed, 223 insertions(+), 8 deletions(-) create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-a4-reset.h create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h -- 2.35.1