From: Ragavendra <ragavendra.bn@gmail.com>
To: peterz@infradead.org, mingo@redhat.com, acme@kernel.org,
namhyung@kernel.org, mark.rutland@arm.com,
alexander.shishkin@linux.intel.com, jolsa@kernel.org,
irogers@google.com, adrian.hunter@intel.com,
kan.liang@linux.intel.com, tglx@linutronix.de, bp@alien8.de,
dave.hansen@linux.intel.com, hpa@zytor.com
Cc: x86@kernel.org, linux-perf-users@vger.kernel.org,
linux-kernel@vger.kernel.org,
Ragavendra <ragavendra.bn@gmail.com>
Subject: [PATCH] perf/x86/intel: Cast u64 variable
Date: Fri, 15 Nov 2024 14:58:30 -0800 [thread overview]
Message-ID: <20241115225829.112361-2-ragavendra.bn@gmail.com> (raw)
Casting (1 >> bit) to u64 before it is compared with pebs_status variable.
Fixes: 21509084f999 perf/x86/intel: Handle multiple records in the PEBS buffer
Signed-off-by: Ragavendra Nagraj <ragavendra.bn@gmail.com>
---
arch/x86/events/intel/ds.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index fa5ea65de0d0..9ea147565dc2 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -2072,7 +2072,7 @@ get_next_pebs_record_by_bit(void *base, void *top, int bit)
/* clear non-PEBS bit and re-check */
pebs_status = status & cpuc->pebs_enabled;
pebs_status &= PEBS_COUNTER_MASK;
- if (pebs_status == (1 << bit))
+ if (pebs_status == (u64) (1 << bit))
return at;
}
}
--
2.46.1
next reply other threads:[~2024-11-15 23:00 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-15 22:58 Ragavendra [this message]
2024-11-16 10:11 ` Peter Zijlstra
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