Re: [PATCH 22/22] iio: accel: adxl345: add debug printout

[kernel test robot <lkp@intel.com>]

Hi Lothar,

kernel test robot noticed the following build warnings:

[auto build test WARNING on jic23-iio/togreg]
[also build test WARNING on linus/master v6.12-rc7 next-20241115]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Lothar-Rubusch/iio-accel-adxl345-fix-comment-on-probe/20241115-190245
base:   https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio.git togreg
patch link:    https://lore.kernel.org/r/20241114231002.98595-23-l.rubusch%40gmail.com
patch subject: [PATCH 22/22] iio: accel: adxl345: add debug printout
config: x86_64-randconfig-121-20241117 (https://download.01.org/0day-ci/archive/20241118/202411180235.gb4VHLRO-lkp@intel.com/config)
compiler: clang version 19.1.3 (https://github.com/llvm/llvm-project ab51eccf88f5321e7c60591c5546b254b6afab99)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241118/202411180235.gb4VHLRO-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202411180235.gb4VHLRO-lkp@intel.com/

sparse warnings: (new ones prefixed by >>)
   drivers/iio/accel/adxl345_core.c:613:6: sparse: sparse: symbol 'adxl345_empty_fifo' was not declared. Should it be static?
>> drivers/iio/accel/adxl345_core.c:720:46: sparse: sparse: incorrect type in argument 2 (different base types) @@     expected signed short [usertype] *fifo_buf @@     got restricted __le16 * @@
   drivers/iio/accel/adxl345_core.c:720:46: sparse:     expected signed short [usertype] *fifo_buf
   drivers/iio/accel/adxl345_core.c:720:46: sparse:     got restricted __le16 *

vim +720 drivers/iio/accel/adxl345_core.c

   606	
   607	/**
   608	 * Empty the fifo. This is needed also in case of overflow or error handling.
   609	 * Read out all remaining elements and reset the fifo_entries counter.
   610	 *
   611	 * @st: The instance to the state object of the sensor.
   612	 */
 > 613	void adxl345_empty_fifo(struct adxl34x_state *st)
   614	{
   615		int regval;
   616		int fifo_entries;
   617	
   618		/* In case the HW is not "clean" just read out remaining elements */
   619		adxl345_get_fifo_entries(st, &fifo_entries);
   620		if (fifo_entries > 0)
   621			adxl345_read_fifo_elements(st, fifo_entries);
   622	
   623		/* Reset the INT_SOURCE register by reading the register */
   624		regmap_read(st->regmap, ADXL345_REG_INT_SOURCE, &regval);
   625	}
   626	
   627	static int adxl345_buffer_postenable(struct iio_dev *indio_dev)
   628	{
   629		struct adxl34x_state *st = iio_priv(indio_dev);
   630		struct adxl34x_platform_data *data = &st->data;
   631		int ret;
   632	
   633		ret = adxl345_set_interrupts(st);
   634		if (ret)
   635			return -EINVAL;
   636	
   637		/* Default to FIFO mode: STREAM, since it covers the general usage
   638		 * and does not bypass the FIFO
   639		 */
   640		data->fifo_mode = ADXL_FIFO_STREAM;
   641		adxl345_set_fifo(st);
   642	
   643		return 0;
   644	}
   645	
   646	static int adxl345_buffer_predisable(struct iio_dev *indio_dev)
   647	{
   648		struct adxl34x_state *st = iio_priv(indio_dev);
   649		struct adxl34x_platform_data *data = &st->data;
   650		int ret;
   651	
   652		/* Turn off interrupts */
   653		st->int_map = 0x00;
   654	
   655		ret = adxl345_set_interrupts(st);
   656		if (ret) {
   657			pr_warn("%s(): Failed to disable INTs\n", __func__);
   658			return -EINVAL;
   659		}
   660	
   661		/* Set FIFO mode: BYPASS, according to the situation */
   662		data->fifo_mode = ADXL_FIFO_BYPASS;
   663		adxl345_set_fifo(st);
   664	
   665		return 0;
   666	}
   667	
   668	static const struct iio_buffer_setup_ops adxl345_buffer_ops = {
   669		.postenable = adxl345_buffer_postenable,
   670		.predisable = adxl345_buffer_predisable,
   671	};
   672	
   673	static int adxl345_get_status(struct adxl34x_state *st, u8 *int_stat)
   674	{
   675		int ret;
   676		unsigned int regval;
   677	
   678		*int_stat = 0;
   679		ret = regmap_read(st->regmap, ADXL345_REG_INT_SOURCE, &regval);
   680		if (ret) {
   681			pr_warn("%s(): Failed to read INT_SOURCE register\n", __func__);
   682			return -EINVAL;
   683		}
   684	
   685		*int_stat = 0xff & regval;
   686		pr_debug("%s(): int_stat 0x%02X (INT_SOURCE)\n", __func__, *int_stat);
   687	
   688		return 0;
   689	}
   690	
   691	static int adxl345_push_fifo_data(struct iio_dev *indio_dev,
   692					  u8 status,
   693					  int fifo_entries)
   694	{
   695		struct adxl34x_state *st = iio_priv(indio_dev);
   696		int ndirs = 3; /* 3 directions */
   697		int i, ret;
   698	
   699		if (fifo_entries <= 0)
   700			return true;
   701	
   702		ret = adxl345_read_fifo_elements(st, fifo_entries);
   703		if (ret)
   704			return false;
   705	
   706		for (i = 0; i < ndirs * fifo_entries; i += ndirs) {
   707			/* To ensure that the FIFO has completely popped, there must be at least 5
   708			 * us between the end of reading the data registers, signified by the
   709			 * transition to register 0x38 from 0x37 or the CS pin going high, and the
   710			 * start of new reads of the FIFO or reading the FIFO_STATUS register. For
   711			 * SPI operation at 1.5 MHz or lower, the register addressing portion of the
   712			 * transmission is sufficient delay to ensure the FIFO has completely
   713			 * popped. It is necessary for SPI operation greater than 1.5 MHz to
   714			 * de-assert the CS pin to ensure a total of 5 us, which is at most 3.4 us
   715			 * at 5 MHz operation.
   716			 */
   717			if (st->fifo_delay && (fifo_entries > 1))
   718				udelay(3);
   719	
 > 720			adxl345_debug_fifo(__func__, st->fifo_buf, i);
   721			iio_push_to_buffers(indio_dev, &st->fifo_buf[i]);
   722		}
   723	
   724		return true;
   725	}
   726	

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