From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: <linux-kernel@vger.kernel.org>, <iommu@lists.linux.dev>
Cc: <joro@8bytes.org>, <robin.murphy@arm.com>, <vasant.hegde@amd.com>,
<arnd@arndb.de>, <ubizjak@gmail.com>,
<linux-arch@vger.kernel.org>, <jgg@nvidia.com>,
<kevin.tian@intel.com>, <jon.grimm@amd.com>,
<santosh.shukla@amd.com>, <pandoh@google.com>,
<kumaranand@google.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: [PATCH v12 0/9] iommu/amd: Use 128-bit cmpxchg operation to update DTE
Date: Mon, 18 Nov 2024 05:49:28 +0000 [thread overview]
Message-ID: <20241118054937.5203-1-suravee.suthikulpanit@amd.com> (raw)
This series modifies current implementation to use 128-bit cmpxchg to
update DTE when needed as specified in the AMD I/O Virtualization
Techonology (IOMMU) Specification.
Please note that I have verified with the hardware designer, and they have
confirmed that the IOMMU hardware has always been implemented with 256-bit
read. The next revision of the IOMMU spec will be updated to correctly
describe this part. Therefore, I have updated the implementation to avoid
unnecessary flushing.
Also, this has been a long series. I would like to thank several folks who
have helped review and provide suggestions along the way :)
Changes in v12:
* Patch 4: Use arch_cmpxchg128_local() instead in amd_iommu_atomic128_set()
and add Reviewed-by tag from Uros.
* Patch 5: Add Reviewed-by tag from Jason.
v11: https://lore.kernel.org/lkml/20241114194436.389961-1-suravee.suthikulpanit@amd.com/
v10: https://lore.kernel.org/lkml/20241113120327.5239-1-suravee.suthikulpanit@amd.com/
v9: https://lore.kernel.org/lkml/20241101162304.4688-1-suravee.suthikulpanit@amd.com/
v8: https://lore.kernel.org/lkml/20241031184243.4184-1-suravee.suthikulpanit@amd.com/
v7: https://lore.kernel.org/lkml/20241031091624.4895-1-suravee.suthikulpanit@amd.com/
v6: https://lore.kernel.org/lkml/20241016051756.4317-1-suravee.suthikulpanit@amd.com/
v5: https://lore.kernel.org/lkml/20241007041353.4756-1-suravee.suthikulpanit@amd.com/
v4: https://lore.kernel.org/lkml/20240916171805.324292-1-suravee.suthikulpanit@amd.com/
v3: https://lore.kernel.org/lkml/20240906121308.5013-1-suravee.suthikulpanit@amd.com/
v2: https://lore.kernel.org/lkml/20240829180726.5022-1-suravee.suthikulpanit@amd.com/
v1: https://lore.kernel.org/lkml/20240819161839.4657-1-suravee.suthikulpanit@amd.com/
Thanks,
Suravee
Suravee Suthikulpanit (9):
iommu/amd: Misc ACPI IVRS debug info clean up
iommu/amd: Disable AMD IOMMU if CMPXCHG16B feature is not supported
iommu/amd: Introduce struct ivhd_dte_flags to store persistent DTE
flags
iommu/amd: Introduce helper function to update 256-bit DTE
iommu/amd: Modify set_dte_entry() to use 256-bit DTE helpers
iommu/amd: Introduce helper function get_dte256()
iommu/amd: Modify clear_dte_entry() to avoid in-place update
iommu/amd: Lock DTE before updating the entry with WRITE_ONCE()
iommu/amd: Remove amd_iommu_apply_erratum_63()
drivers/iommu/amd/amd_iommu.h | 4 +-
drivers/iommu/amd/amd_iommu_types.h | 41 ++-
drivers/iommu/amd/init.c | 229 +++++++++--------
drivers/iommu/amd/iommu.c | 378 +++++++++++++++++++++-------
4 files changed, 440 insertions(+), 212 deletions(-)
--
2.34.1
next reply other threads:[~2024-11-18 5:50 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-18 5:49 Suravee Suthikulpanit [this message]
2024-11-18 5:49 ` [PATCH v12 1/9] iommu/amd: Misc ACPI IVRS debug info clean up Suravee Suthikulpanit
2024-11-18 5:49 ` [PATCH v12 2/9] iommu/amd: Disable AMD IOMMU if CMPXCHG16B feature is not supported Suravee Suthikulpanit
2024-11-18 5:49 ` [PATCH v12 3/9] iommu/amd: Introduce struct ivhd_dte_flags to store persistent DTE flags Suravee Suthikulpanit
2024-11-18 5:49 ` [PATCH v12 4/9] iommu/amd: Introduce helper function to update 256-bit DTE Suravee Suthikulpanit
2024-11-18 5:49 ` [PATCH v12 5/9] iommu/amd: Modify set_dte_entry() to use 256-bit DTE helpers Suravee Suthikulpanit
2024-11-18 5:49 ` [PATCH v12 6/9] iommu/amd: Introduce helper function get_dte256() Suravee Suthikulpanit
2024-11-18 5:49 ` [PATCH v12 7/9] iommu/amd: Modify clear_dte_entry() to avoid in-place update Suravee Suthikulpanit
2024-11-18 5:49 ` [PATCH v12 8/9] iommu/amd: Lock DTE before updating the entry with WRITE_ONCE() Suravee Suthikulpanit
2024-11-18 5:49 ` [PATCH v12 9/9] iommu/amd: Remove amd_iommu_apply_erratum_63() Suravee Suthikulpanit
2024-12-18 8:38 ` [PATCH v12 0/9] iommu/amd: Use 128-bit cmpxchg operation to update DTE Joerg Roedel
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