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[31.30.173.13]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432da24459bsm192837965e9.6.2024.11.19.00.34.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Nov 2024 00:34:08 -0800 (PST) Date: Tue, 19 Nov 2024 09:34:07 +0100 From: Andrew Jones To: Ingo Molnar Cc: Prabhakar , Stephen Rothwell , Quan Zhou , Anup Patel , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , "Liang, Kan" , Paul Walmsley , Palmer Dabbelt , Albert Ou , Colton Lewis , Oliver Upton , Geert Uytterhoeven , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Chris Paterson Subject: Re: [PATCH v2] riscv: perf: Drop defining `perf_instruction_pointer()` and `perf_misc_flags()` Message-ID: <20241119-8542ffd5c08526b665895722@orel> References: <20241116160506.5324-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Tue, Nov 19, 2024 at 08:52:28AM +0100, Ingo Molnar wrote: > > * Prabhakar wrote: > > > From: Lad Prabhakar > > > > With commit 2c47e7a74f44 ("perf/core: Correct perf sampling with guest > > VMs"), the perf core now handles the functionality previously requiring > > arch-specific definitions of `perf_instruction_pointer()` and > > `perf_misc_flags()`. As these definitions are no longer necessary for > > RISC-V, this patch removes their implementation and declarations. > > > > This change also fixes the following build issue on RISC-V: > > > > ./include/linux/perf_event.h:1679:84: error: macro "perf_misc_flags" passed 2 arguments, but takes just 1 > > ./include/linux/perf_event.h:1679:22: error: 'perf_misc_flags' redeclared as different kind of symbol > > ./include/linux/perf_event.h:1680:22: error: conflicting types for 'perf_instruction_pointer'; have 'long unsigned int(struct perf_event *, struct pt_regs *)' > > > > The above errors arise from conflicts between the core definitions in > > `linux/perf_event.h` and the RISC-V-specific definitions in > > `arch/riscv/include/asm/perf_event.h`. Removing the RISC-V-specific > > definitions resolves these issues and aligns the architecture with the > > updated perf core. > > > > Fixes: 2c47e7a74f44 ("perf/core: Correct perf sampling with guest VMs") > > Yeah, so the Fixes tag is wrong - this is not a build bug > with that commit, and your patch does not even apply to > the perf events tree. > > This is a semantic merge conflict that arises in linux-next - the > riscv version of perf_instruction_pointer() function doesn't even > exist in the perf tree... > > AFAICS the problem is that the riscv tree applied this commit: > > 5bb5ccb3e8d8 ("riscv: perf: add guest vs host distinction") > > While the perf tree solved this in a more generic fashion: > > 2c47e7a74f44 perf/core: Correct perf sampling with guest VMs > baff01f3d75f perf/x86: Refactor misc flag assignments > 3e807cf07d96 perf/powerpc: Use perf_arch_instruction_pointer() > 04782e63917d perf/core: Hoist perf_instruction_pointer() and perf_misc_flags() > e33ed362cf9e perf/arm: Drop unused functions > > So I believe, assuming the perf version works fine on riscv > (I haven't tested it), that the solution is to revert > 5bb5ccb3e8d8 either in the riscv tree, or upon merging it. Hi Ingo, This patch isn't a complete revert of 5bb5ccb3e8d8. The early returns in perf_callchain_user() and perf_callchain_kernel() should remain and the CONFIG_PERF_EVENTS #ifdef in arch/riscv/include/asm/perf_event.h should remain as well. Thanks, drew