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charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Tue, Nov 26, 2024 at 10:21:10PM -0600, Bjorn Andersson wrote: > On Thu, Nov 07, 2024 at 11:58:09AM +0000, Manivannan Sadhasivam via B4 Relay wrote: > > From: Manivannan Sadhasivam > > > > Starting from SM8550, UFS PHY GDSCs doesn't support hardware retention. So > > using RETAIN_FF_ENABLE is wrong. Moreover, without ALWAYS_ON flag, GDSCs > > will get powered down during suspend, causing the UFS PHY to loose its > > state. And this will lead to below UFS error during resume as observed on > > SM8550-QRD: > > > > Unless I'm mistaken, ALWAYS_ON makes GDSC keep the gendpd ALWAYS_ON as > well, which in turn would ensure that any parent power-domain is kept > active - which in the case of GCC would imply CX. > That's correct. But there is one more way to fix this issue. We can powerdown UFS (controller and device) during suspend and the ufs-qcom driver can specify the default suspend level based on platform. I think that would be more appropriate than forbidding CX power collapse for the whole SoC. Let me cook up a patch. > The way we've dealt with this elsewhere is to use the PWRSTS_RET_ON flag > in pwrsts; we then keep the GDSC active, but release any votes to the > parent and rely on hardware to kick in MX when we're shutting down CX. > Perhaps this can't be done for some reason? > UFS team told me that there is no 'hardware retention' for UFS PHYs starting from SM8550 and asked to keep GDSCs ALWAYS_ON. So that would mean, there is no MX backing also. - Mani > > PS. In contrast to other platforms where we've dealt with issues of > under voltage crashes, I see &gcc in sm8550.dtsi doesn't specify a > parent power-domain, which would mean that the required-opps = <&nom> of > &ufs_mem_hc is voting for nothing. > > Regards, > Bjorn > > > ufshcd-qcom 1d84000.ufs: ufshcd_uic_hibern8_exit: hibern8 exit failed. ret = 5 > > ufshcd-qcom 1d84000.ufs: __ufshcd_wl_resume: hibern8 exit failed 5 > > ufs_device_wlun 0:0:0:49488: ufshcd_wl_resume failed: 5 > > ufs_device_wlun 0:0:0:49488: PM: dpm_run_callback(): scsi_bus_resume+0x0/0x84 returns 5 > > ufs_device_wlun 0:0:0:49488: PM: failed to resume async: error 5 > > > > Cc: stable@vger.kernel.org # 6.8 > > Fixes: 1fe8273c8d40 ("clk: qcom: gcc-sm8550: Add the missing RETAIN_FF_ENABLE GDSC flag") > > Reported-by: Neil Armstrong > > Suggested-by: Nitin Rawat > > Signed-off-by: Manivannan Sadhasivam > > --- > > drivers/clk/qcom/gcc-sm8550.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/clk/qcom/gcc-sm8550.c b/drivers/clk/qcom/gcc-sm8550.c > > index 5abaeddd6afc..7dd08e175820 100644 > > --- a/drivers/clk/qcom/gcc-sm8550.c > > +++ b/drivers/clk/qcom/gcc-sm8550.c > > @@ -3046,7 +3046,7 @@ static struct gdsc ufs_phy_gdsc = { > > .name = "ufs_phy_gdsc", > > }, > > .pwrsts = PWRSTS_OFF_ON, > > - .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE, > > + .flags = POLL_CFG_GDSCR | ALWAYS_ON, > > }; > > > > static struct gdsc ufs_mem_phy_gdsc = { > > @@ -3055,7 +3055,7 @@ static struct gdsc ufs_mem_phy_gdsc = { > > .name = "ufs_mem_phy_gdsc", > > }, > > .pwrsts = PWRSTS_OFF_ON, > > - .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE, > > + .flags = POLL_CFG_GDSCR | ALWAYS_ON, > > }; > > > > static struct gdsc usb30_prim_gdsc = { > > > > -- > > 2.25.1 > > > > -- மணிவண்ணன் சதாசிவம்