[PATCH] arm64: dts: ti: k3-j7200: Add node to disable loopback connection

[Anurag Dutta <a-dutta@ti.com>]

CTRLMMR_MCU_SPI1_CTRL register controls if MCU_SPI1 is directly
connected to SPI3 in the MAIN Domain (default) or if MCU_SPI1
and SPI3 are independently pinned out. By default, the field
SPI1_LINKDIS (Bit 0) is set to 0h. In order to disable the direct
connection, the SPI1_LINKDIS (Bit 0) needs to be set to 1h. Model
this functionality as a "reg-mux" device and based on the idle-state
property, enable/disable the connection bewtween MCU_SPI1 and MAIN_SPI3.

The register field description has been referred from J7200 TRM [1]
(Table 5-517. CTRLMMR_MCU_SPI1_CTRL Register Field Descriptions). 

[1] https://www.ti.com/lit/pdf/spruiu1

Signed-off-by: Anurag Dutta <a-dutta@ti.com>
---

Hi all,
The above functionality can be achieved by changing the idle-state of
the "spi1_linkdis" node. As observed, when the SPI1_LINKDIS (Bit 0)
is 0h, the connection remains enabled and SPIDEV loopback test is
succssful [1]. But, when the state changes to 1, the the SPI1_LINKDIS
(Bit 0) becomes 1h and the SPIDEV loopback test fails [2] indicating
that the connection between MCU_SPI1 and MAIN_SPI3 has been disabled.

Test logs:
[1] https://gist.github.com/anuragdutta731/9ac287f27f1dfb3a5ccee4cc86e02dbb
[2] https://gist.github.com/anuragdutta731/3ed7b7b5a1a3dab494ba46858b972088
 
 arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 4 ++++
 arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi       | 7 +++++++
 2 files changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index db43e7e10b76..f684ce6ad9ad 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -409,6 +409,10 @@ &serdes_ln_ctrl {
 		      <J7200_SERDES0_LANE2_QSGMII_LANE1>, <J7200_SERDES0_LANE3_IP4_UNUSED>;
 };
 
+&mcu_spi1 {
+	mux-controls = <&spi1_linkdis 0>;
+};
+
 &usb_serdes_mux {
 	idle-states = <1>; /* USB0 to SERDES lane 3 */
 	bootph-all;
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index 6a8453865874..56ab144fea07 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -184,6 +184,13 @@ phy_gmii_sel: phy@4040 {
 			reg = <0x4040 0x4>;
 			#phy-cells = <1>;
 		};
+
+		spi1_linkdis: mux-controller@4060 {
+			compatible = "reg-mux";
+			reg = <0x4060 0x4>;
+			#mux-control-cells = <1>;
+			mux-reg-masks = <0x0 0x1>;
+		};
 	};
 
 	wkup_conf: bus@43000000 {
-- 
2.34.1