From: Advait Dhamorikar <advaitdhamorikar@gmail.com>
To: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Linus Walleij <linus.walleij@linaro.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Thierry Reding <treding@nvidia.com>,
Florian Fainelli <florian.fainelli@broadcom.com>,
Stefan Eichenberger <eichest@gmail.com>
Cc: linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
Advait Dhamorikar <advaitdhamorikar@gmail.com>
Subject: [PATCH] phy: marvell: Fix spelling mistake "exlicitly" -> "explicitly"
Date: Wed, 27 Nov 2024 16:13:33 +0530 [thread overview]
Message-ID: <20241127104333.18944-1-advaitdhamorikar@gmail.com> (raw)
Fix spelling mistake in mvebu_comphy_ethernet_init_reset
comments.
Signed-off-by: Advait Dhamorikar <advaitdhamorikar@gmail.com>
---
drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
index fefc02d921e6..71f9c14fb50d 100644
--- a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
+++ b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
@@ -422,7 +422,7 @@ static int mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane)
/* wait until clocks are ready */
mdelay(1);
- /* exlicitly disable 40B, the bits isn't clear on reset */
+ /* explicitly disable 40B, the bits isn't clear on reset */
regmap_read(priv->regmap, MVEBU_COMPHY_CONF6(lane->id), &val);
val &= ~MVEBU_COMPHY_CONF6_40B;
regmap_write(priv->regmap, MVEBU_COMPHY_CONF6(lane->id), val);
--
2.34.1
next reply other threads:[~2024-11-27 10:43 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-27 10:43 Advait Dhamorikar [this message]
2024-12-08 17:02 ` Vinod Koul
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