From: Mario Limonciello <mario.limonciello@amd.com>
To: "Gautham R . Shenoy" <gautham.shenoy@amd.com>
Cc: Perry Yuan <perry.yuan@amd.com>, <linux-kernel@vger.kernel.org>,
<linux-pm@vger.kernel.org>,
Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com>,
Mario Limonciello <mario.limonciello@amd.com>
Subject: [PATCH 03/15] cpufreq/amd-pstate: Drop cached epp_policy variable
Date: Thu, 5 Dec 2024 16:28:35 -0600 [thread overview]
Message-ID: <20241205222847.7889-4-mario.limonciello@amd.com> (raw)
In-Reply-To: <20241205222847.7889-1-mario.limonciello@amd.com>
epp_policy is not used by any of the current code and there
is no need to cache it.
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
drivers/cpufreq/amd-pstate.c | 3 ---
drivers/cpufreq/amd-pstate.h | 2 --
2 files changed, 5 deletions(-)
diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index 7eb013585df51..22e212ca514c5 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -1476,7 +1476,6 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)
return -ENOMEM;
cpudata->cpu = policy->cpu;
- cpudata->epp_policy = 0;
ret = amd_pstate_init_perf(cpudata);
if (ret)
@@ -1583,8 +1582,6 @@ static int amd_pstate_epp_update_limit(struct cpufreq_policy *policy)
value &= ~AMD_CPPC_DES_PERF(~0L);
value |= AMD_CPPC_DES_PERF(0);
- cpudata->epp_policy = cpudata->policy;
-
/* Get BIOS pre-defined epp value */
epp = amd_pstate_get_epp(cpudata, value);
if (epp < 0) {
diff --git a/drivers/cpufreq/amd-pstate.h b/drivers/cpufreq/amd-pstate.h
index cd573bc6b6db8..7765c82f975c6 100644
--- a/drivers/cpufreq/amd-pstate.h
+++ b/drivers/cpufreq/amd-pstate.h
@@ -57,7 +57,6 @@ struct amd_aperf_mperf {
* @hw_prefcore: check whether HW supports preferred core featue.
* Only when hw_prefcore and early prefcore param are true,
* AMD P-State driver supports preferred core featue.
- * @epp_policy: Last saved policy used to set energy-performance preference
* @epp_cached: Cached CPPC energy-performance preference value
* @policy: Cpufreq policy value
* @cppc_cap1_cached Cached MSR_AMD_CPPC_CAP1 register value
@@ -94,7 +93,6 @@ struct amd_cpudata {
bool hw_prefcore;
/* EPP feature related attributes*/
- s16 epp_policy;
s16 epp_cached;
u32 policy;
u64 cppc_cap1_cached;
--
2.43.0
next prev parent reply other threads:[~2024-12-05 22:29 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-05 22:28 [PATCH 00/15] amd-pstate 6.14 cleanups and improvements Mario Limonciello
2024-12-05 22:28 ` [PATCH 01/15] cpufreq/amd-pstate: Add trace event for EPP perf updates Mario Limonciello
2024-12-06 5:05 ` Yuan, Perry
2024-12-06 5:44 ` Gautham R. Shenoy
2024-12-05 22:28 ` [PATCH 02/15] cpufreq/amd-pstate: convert mutex use to guard() Mario Limonciello
2024-12-06 6:15 ` Gautham R. Shenoy
2024-12-05 22:28 ` Mario Limonciello [this message]
2024-12-06 6:16 ` [PATCH 03/15] cpufreq/amd-pstate: Drop cached epp_policy variable Gautham R. Shenoy
2024-12-05 22:28 ` [PATCH 04/15] cpufreq/amd-pstate: Use FIELD_PREP and FIELD_GET macros Mario Limonciello
2024-12-06 6:21 ` Gautham R. Shenoy
2024-12-05 22:28 ` [PATCH 05/15] cpufreq/amd-pstate: Store the boost numerator as highest perf again Mario Limonciello
2024-12-06 6:25 ` Gautham R. Shenoy
2024-12-05 22:28 ` [PATCH 06/15] cpufreq/amd-pstate: Use boost numerator for upper bound of frequencies Mario Limonciello
2024-12-06 6:27 ` Gautham R. Shenoy
2024-12-05 22:28 ` [PATCH 07/15] cpufreq/amd-pstate: Only update the cached value in msr_set_epp() on success Mario Limonciello
2024-12-06 6:32 ` Gautham R. Shenoy
2024-12-05 22:28 ` [PATCH 08/15] cpufreq/amd-pstate: store all values in cpudata struct in khz Mario Limonciello
2024-12-06 6:43 ` Gautham R. Shenoy
2024-12-05 22:28 ` [PATCH 09/15] cpufreq/amd-pstate: Change amd_pstate_update_perf() to return an int Mario Limonciello
2024-12-06 6:43 ` Gautham R. Shenoy
2024-12-05 22:28 ` [PATCH 10/15] cpufreq/amd-pstate: Move limit updating code Mario Limonciello
2024-12-06 3:10 ` kernel test robot
2024-12-06 15:19 ` Gautham R. Shenoy
2024-12-05 22:28 ` [PATCH 11/15] cpufreq/amd-pstate: Cache EPP value and use that everywhere Mario Limonciello
2024-12-06 16:14 ` Gautham R. Shenoy
2024-12-06 16:16 ` Mario Limonciello
2024-12-05 22:28 ` [PATCH 12/15] cpufreq/amd-pstate: Always write EPP value when updating perf Mario Limonciello
2024-12-05 22:28 ` [PATCH 13/15] cpufreq/amd-pstate: Check if CPPC request has changed before writing to the MSR or shared memory Mario Limonciello
2024-12-05 22:28 ` [PATCH 14/15] cpufreq/amd-pstate: Drop ret variable from amd_pstate_set_energy_pref_index() Mario Limonciello
2024-12-05 22:28 ` [PATCH 15/15] cpufreq/amd-pstate: Set different default EPP policy for Epyc and Ryzen Mario Limonciello
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20241205222847.7889-4-mario.limonciello@amd.com \
--to=mario.limonciello@amd.com \
--cc=Dhananjay.Ugwekar@amd.com \
--cc=gautham.shenoy@amd.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=perry.yuan@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®