From: Mario Limonciello <mario.limonciello@amd.com>
To: "Gautham R . Shenoy" <gautham.shenoy@amd.com>
Cc: Perry Yuan <perry.yuan@amd.com>, <linux-kernel@vger.kernel.org>,
<linux-pm@vger.kernel.org>,
Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com>,
Mario Limonciello <mario.limonciello@amd.com>
Subject: [PATCH v2 03/16] cpufreq/amd-pstate: Add trace event for EPP perf updates
Date: Sun, 8 Dec 2024 00:30:18 -0600 [thread overview]
Message-ID: <20241208063031.3113-4-mario.limonciello@amd.com> (raw)
In-Reply-To: <20241208063031.3113-1-mario.limonciello@amd.com>
In "active" mode the most important thing for debugging whether
an issue is hardware or software based is to look at what was the
last thing written to the CPPC request MSR or shared memory region.
The 'amd_pstate_epp_perf' trace event shows the values being written
for all CPUs.
Reviewed-by: Perry Yuan <perry.yuan@amd.com>
Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
v2:
* Fix boost in some calls
---
drivers/cpufreq/amd-pstate-trace.h | 45 ++++++++++++++++++++++++++++++
drivers/cpufreq/amd-pstate.c | 28 +++++++++++++++++++
2 files changed, 73 insertions(+)
diff --git a/drivers/cpufreq/amd-pstate-trace.h b/drivers/cpufreq/amd-pstate-trace.h
index 35f38ae67fb13..e2221a4b6901c 100644
--- a/drivers/cpufreq/amd-pstate-trace.h
+++ b/drivers/cpufreq/amd-pstate-trace.h
@@ -88,6 +88,51 @@ TRACE_EVENT(amd_pstate_perf,
)
);
+TRACE_EVENT(amd_pstate_epp_perf,
+
+ TP_PROTO(unsigned int cpu_id,
+ unsigned int highest_perf,
+ unsigned int epp,
+ unsigned int min_perf,
+ unsigned int max_perf,
+ bool boost
+ ),
+
+ TP_ARGS(cpu_id,
+ highest_perf,
+ epp,
+ min_perf,
+ max_perf,
+ boost),
+
+ TP_STRUCT__entry(
+ __field(unsigned int, cpu_id)
+ __field(unsigned int, highest_perf)
+ __field(unsigned int, epp)
+ __field(unsigned int, min_perf)
+ __field(unsigned int, max_perf)
+ __field(bool, boost)
+ ),
+
+ TP_fast_assign(
+ __entry->cpu_id = cpu_id;
+ __entry->highest_perf = highest_perf;
+ __entry->epp = epp;
+ __entry->min_perf = min_perf;
+ __entry->max_perf = max_perf;
+ __entry->boost = boost;
+ ),
+
+ TP_printk("cpu%u: [%u<->%u]/%u, epp=%u, boost=%u",
+ (unsigned int)__entry->cpu_id,
+ (unsigned int)__entry->min_perf,
+ (unsigned int)__entry->max_perf,
+ (unsigned int)__entry->highest_perf,
+ (unsigned int)__entry->epp,
+ (bool)__entry->boost
+ )
+);
+
#endif /* _AMD_PSTATE_TRACE_H */
/* This part must be outside protection */
diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index 5e0edb65de32a..a59c897dd59c7 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -324,6 +324,14 @@ static int amd_pstate_set_energy_pref_index(struct amd_cpudata *cpudata,
return -EBUSY;
}
+ if (trace_amd_pstate_epp_perf_enabled()) {
+ trace_amd_pstate_epp_perf(cpudata->cpu, cpudata->highest_perf,
+ epp,
+ AMD_CPPC_MIN_PERF(cpudata->cppc_req_cached),
+ AMD_CPPC_MAX_PERF(cpudata->cppc_req_cached),
+ cpudata->boost_state);
+ }
+
ret = amd_pstate_set_epp(cpudata, epp);
return ret;
@@ -1598,6 +1606,13 @@ static int amd_pstate_epp_update_limit(struct cpufreq_policy *policy)
WRITE_ONCE(cpudata->cppc_req_cached, value);
+ if (trace_amd_pstate_epp_perf_enabled()) {
+ trace_amd_pstate_epp_perf(cpudata->cpu, cpudata->highest_perf, epp,
+ cpudata->min_limit_perf,
+ cpudata->max_limit_perf,
+ policy->boost_enabled);
+ }
+
amd_pstate_update_perf(cpudata, cpudata->min_limit_perf, 0U,
cpudata->max_limit_perf, false);
@@ -1641,6 +1656,13 @@ static void amd_pstate_epp_reenable(struct amd_cpudata *cpudata)
max_perf = READ_ONCE(cpudata->highest_perf);
+ if (trace_amd_pstate_epp_perf_enabled()) {
+ trace_amd_pstate_epp_perf(cpudata->cpu, cpudata->highest_perf,
+ cpudata->epp_cached,
+ AMD_CPPC_MIN_PERF(cpudata->cppc_req_cached),
+ max_perf, cpudata->boost_state);
+ }
+
amd_pstate_update_perf(cpudata, 0, 0, max_perf, false);
amd_pstate_set_epp(cpudata, cpudata->epp_cached);
}
@@ -1669,6 +1691,12 @@ static int amd_pstate_epp_cpu_offline(struct cpufreq_policy *policy)
mutex_lock(&amd_pstate_limits_lock);
+ if (trace_amd_pstate_epp_perf_enabled()) {
+ trace_amd_pstate_epp_perf(cpudata->cpu, cpudata->highest_perf,
+ AMD_CPPC_EPP_BALANCE_POWERSAVE,
+ min_perf, min_perf, policy->boost_enabled);
+ }
+
amd_pstate_update_perf(cpudata, min_perf, 0, min_perf, false);
amd_pstate_set_epp(cpudata, AMD_CPPC_EPP_BALANCE_POWERSAVE);
--
2.43.0
next prev parent reply other threads:[~2024-12-08 6:30 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-08 6:30 [PATCH v2 00/16] amd-pstate fixes and improvements for 6.14 Mario Limonciello
2024-12-08 6:30 ` [PATCH v2 01/16] cpufreq/amd-pstate: Store the boost numerator as highest perf again Mario Limonciello
2024-12-08 6:30 ` [PATCH v2 02/16] cpufreq/amd-pstate: Use boost numerator for upper bound of frequencies Mario Limonciello
2024-12-08 6:30 ` Mario Limonciello [this message]
2024-12-08 6:30 ` [PATCH v2 04/16] cpufreq/amd-pstate: convert mutex use to guard() Mario Limonciello
2024-12-08 6:30 ` [PATCH v2 05/16] cpufreq/amd-pstate: Drop cached epp_policy variable Mario Limonciello
2024-12-08 6:30 ` [PATCH v2 06/16] cpufreq/amd-pstate: Use FIELD_PREP and FIELD_GET macros Mario Limonciello
2024-12-08 6:30 ` [PATCH v2 07/16] cpufreq/amd-pstate: Only update the cached value in msr_set_epp() on success Mario Limonciello
2024-12-08 6:30 ` [PATCH v2 08/16] cpufreq/amd-pstate: store all values in cpudata struct in khz Mario Limonciello
2024-12-08 6:30 ` [PATCH v2 09/16] cpufreq/amd-pstate: Change amd_pstate_update_perf() to return an int Mario Limonciello
2024-12-08 6:30 ` [PATCH v2 10/16] cpufreq/amd-pstate: Move limit updating code Mario Limonciello
2024-12-08 6:30 ` [PATCH v2 11/16] cpufreq/amd-pstate: Cache EPP value and use that everywhere Mario Limonciello
2024-12-08 6:30 ` [PATCH v2 12/16] cpufreq/amd-pstate: Always write EPP value when updating perf Mario Limonciello
2024-12-09 8:42 ` Gautham R. Shenoy
2024-12-09 16:49 ` Mario Limonciello
2024-12-09 17:15 ` Mario Limonciello
2024-12-10 11:10 ` Gautham R. Shenoy
2024-12-08 6:30 ` [PATCH v2 13/16] cpufreq/amd-pstate: Check if CPPC request has changed before writing to the MSR or shared memory Mario Limonciello
2024-12-09 8:56 ` Gautham R. Shenoy
2024-12-09 16:41 ` Mario Limonciello
2024-12-08 6:30 ` [PATCH v2 14/16] cpufreq/amd-pstate: Drop ret variable from amd_pstate_set_energy_pref_index() Mario Limonciello
2024-12-09 9:25 ` Gautham R. Shenoy
2024-12-08 6:30 ` [PATCH v2 15/16] cpufreq/amd-pstate: Set different default EPP policy for Epyc and Ryzen Mario Limonciello
2024-12-09 9:27 ` Gautham R. Shenoy
2024-12-08 6:30 ` [PATCH v2 16/16] cpufreq/amd-pstate: Drop boost_state variable Mario Limonciello
2024-12-09 10:24 ` Gautham R. Shenoy
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