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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: Marc Zyngier <maz@kernel.org>, Valentin Schneider <vschneid@redhat.com>
Subject: [patch 0/2] genirq: Make interrupt context enforcing work unconditionally
Date: Tue, 10 Dec 2024 11:20:41 +0100 (CET)	[thread overview]
Message-ID: <20241210101114.126983214@linutronix.de> (raw)

While looking at GENERIC_PENDING_IRQ I stumbled over the fact, that the
interrupt context enforcement for ARM[64] which was attempted by

 commit 1b57d91b969c ("irqchip/gic-v2, v3: Prevent SW resends entirely")

actually never worked because handle_enforce_irqctx() is a wrapper around
the actual check and that wrapper is only providing the informatuib when
GENERIC_PENDING_IRQ is set. That's not the case for ARM[64].

Make it available unconditionally and clean up the now pointless wrapper.

Thanks,

	tglx
---
 internals.h |    8 --------
 irqdesc.c   |    2 +-
 resend.c    |    2 +-
 3 files changed, 2 insertions(+), 10 deletions(-)


             reply	other threads:[~2024-12-10 10:20 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-10 10:20 Thomas Gleixner [this message]
2024-12-10 10:20 ` [patch 1/2] genirq: Make handle_enforce_irqctx() unconditionally available Thomas Gleixner
2025-01-15 10:04   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner
2024-12-10 10:20 ` [patch 2/2] genirq: Remove handle_enforce_irqctx() wrapper Thomas Gleixner
2025-01-15 10:04   ` [tip: irq/core] " tip-bot2 for Thomas Gleixner

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