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charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Thu, Dec 05, 2024 at 11:23:11AM +0100, Krzysztof Kozlowski wrote: > On Wed, Dec 04, 2024 at 06:52:47PM +0800, Ziyue Zhang wrote: > > On some platforms, the power supply for PCIe PHY is not able to provide > > enough current when it works in LPM mode. Hence, PCIe PHY driver needs to > > set current load to vote the regulator to HPM mode. > > > > Document the current load as properties for each power supply PCIe PHY > > required, namely vdda-phy-max-microamp, vdda-pll-max-microamp and > > vdda-qref-max-microamp, respectively.PCIe PHY driver should parse them to > > set appropriate current load during PHY power on. > > > > This three properties are optional and not mandatory for those platforms > > that PCIe PHY can still work with power supply. > > > Uh uh, so the downstream comes finally! > > No sorry guys, use existing regulator bindings for this. > Maybe they got inspired by upstream UFS bindings? Documentation/devicetree/bindings/ufs/ufs-common.yaml: vcc-max-microamp vccq-max-microamp vccq2-max-microamp Regulator binding only describes the min/max load for the regulators and not consumers. What if the consumers need to set variable load per platform? Should they hardcode the load in driver? (even so, the load should not vary for each board). - Mani -- மணிவண்ணன் சதாசிவம்