From: Mihai Sain <mihai.sain@microchip.com>
To: <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
<claudiu.beznea@tuxon.dev>, <robh@kernel.org>,
<krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: Mihai Sain <mihai.sain@microchip.com>
Subject: [PATCH 2/2] ARM: dts: microchip: sam9x7: Add address/size to spi-controller nodes
Date: Wed, 18 Dec 2024 10:03:33 +0200 [thread overview]
Message-ID: <20241218080333.2225-3-mihai.sain@microchip.com> (raw)
In-Reply-To: <20241218080333.2225-1-mihai.sain@microchip.com>
Since these properties are common for all spi subnodes,
add them to SoC dtsi instead of board dts.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
---
arch/arm/boot/dts/microchip/sam9x7.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/microchip/sam9x7.dtsi b/arch/arm/boot/dts/microchip/sam9x7.dtsi
index aedba0a8318f..b217a908f525 100644
--- a/arch/arm/boot/dts/microchip/sam9x7.dtsi
+++ b/arch/arm/boot/dts/microchip/sam9x7.dtsi
@@ -132,6 +132,8 @@ spi4: spi@400 {
compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
clock-names = "spi_clk";
dmas = <&dma0
@@ -203,6 +205,8 @@ spi5: spi@400 {
compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
clock-names = "spi_clk";
dmas = <&dma0
@@ -697,6 +701,8 @@ spi0: spi@400 {
compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
clock-names = "spi_clk";
dmas = <&dma0
@@ -768,6 +774,8 @@ spi1: spi@400 {
compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
clock-names = "spi_clk";
dmas = <&dma0
@@ -839,6 +847,8 @@ spi2: spi@400 {
compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
clock-names = "spi_clk";
dmas = <&dma0
@@ -910,6 +920,8 @@ spi3: spi@400 {
compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
clock-names = "spi_clk";
dmas = <&dma0
--
2.47.1
next prev parent reply other threads:[~2024-12-18 8:05 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-18 8:03 [PATCH 0/2] Add address/size properties " Mihai Sain
2024-12-18 8:03 ` [PATCH 1/2] ARM: dts: microchip: sam9x60: Add address/size " Mihai Sain
2024-12-18 8:03 ` Mihai Sain [this message]
2024-12-19 9:06 ` [PATCH 0/2] Add address/size properties " Claudiu Beznea
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