From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pj1-f45.google.com (mail-pj1-f45.google.com [209.85.216.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9C2A919D070 for ; Thu, 19 Dec 2024 20:54:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.45 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734641687; cv=none; b=iHho8Y9Zrxa9nhyBt+AihxX+DnqGz8Vz3SbATPoHbDp7vqxR1wiRD2WsAbelXofsznnh1fSZ3bVYwuSs7I0PSwfLYpR6OzpvoCqiLZBOgB7+t+BjgaEG/t58n9WrC3zl5jeyCuicDqO+BHOgXRz9BRDRPO5SO0Kp8wF1vK2hUzo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734641687; c=relaxed/simple; bh=r6UmP61ELs5pfR8B4wODxwMC23bs/PFtz7wL9uq+PK8=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=GvQmqt+5GcXIu9TeIGkcd98mWB7474HeOdJDKW0rJJjd2v9/At0NluzaWwa4iebE6U9kOTyjhHhw0H9BMumyF7yQchQcBnHg7R7SFJaRxCKBAr1XyK/eQwln/OPY76VFlOFbRnpPL54WCllevzs0i3AA4bKQQM5IhAADHLkCBFo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org; spf=pass smtp.mailfrom=chromium.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b=fogQa1j1; arc=none smtp.client-ip=209.85.216.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="fogQa1j1" Received: by mail-pj1-f45.google.com with SMTP id 98e67ed59e1d1-2ef70c7efa5so881247a91.2 for ; Thu, 19 Dec 2024 12:54:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1734641685; x=1735246485; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=f5v7hfAH4N73EaPycyY4X+uvT6DTJlai0fstZvBNoD8=; b=fogQa1j1N0fQdQ5Y/cKrtmy5SPY77U38awTh8/8jN/iMSNr7E5JjXG+Q7GRGVo0QGz uTf4Ep4OQA9y36Ply1EkGwa1rnVKzh36hm4xXsXT/w1fjtAwGMLNUtvH3ftbcuPgVZY6 p6CxaOoHP4udp0q+IED5sDiy9Lg/GkSVecAD0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734641685; x=1735246485; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=f5v7hfAH4N73EaPycyY4X+uvT6DTJlai0fstZvBNoD8=; b=GlIJ89fgPRUGFlu/FdbVu1SMeo/skvBx5/bGdoJwipYdTRej9hTUrT/jrnSIZ2QyG1 JX8VIaAhJzsAbMZ/tbdIS/L2TCVk3HfJAIBM7pw66WZx5SqYf6jlCtVIFNsqnDonm3Nk 7adaA9gRxi+PUCpPo3OOp+KBswlLoctTqTmPIdC4QAuSQANY6efs/UwHJ96/ywIMzdv7 VMfL8cL3SdQaIGEW3fMF/VLDE/j3jB2TieJ2GP2BChrvGD+LGoRzs7VCgg0ZKanUyV8p Pp63EmH9nX1ib70GBs+CtkHJhbaToTvjcd/qe95PFGpO9248kn1DSX5jBCWgwbSseJyy PDag== X-Forwarded-Encrypted: i=1; AJvYcCXhq3PSoD8tf5G3JdTQ99X9tgrV7HC0L1LsP4srcNTJP5Ok7zcufu0y3cofbWQeN10QA6vGTGnMlPMBCmI=@vger.kernel.org X-Gm-Message-State: AOJu0Yz4Y31MvRHZvuep37j6SmvdBKke5bzSypxu4BP6Wps/ChdJ+oFd 7LdRXwTzQdJXSjp40W5nYjxh+rFNdgRMuKpmWk64NfDpcLojEZi2GcY4ID8hgA== X-Gm-Gg: ASbGncsmuW4XZbytOxTKkX6JgctLrg2lvZXFuLHbJq91UO9r6PQmyDDdThhSPgYjKvb SuTPe8KBCN5nXyMhPWARd5XUkbcku6lQjFOnhfmDjbv67Ski/F0SGg9755R/kYpXn4c7ZhOZxH8 8/YUXVybtWcRc7q/d8wWTrg0AfvqEs8Y44/O/ghrQahCJyx7uDmg5IuiuLm0rJyYqzy5zwP4D0g l1KBdWvKdTXecO3POU7CWOZRxj8VW9n1jyFqh4u95CP5lUR0NAkDfzS/uoL2L+IRYoKIFxajGGr X-Google-Smtp-Source: AGHT+IHWXfuT+FExiN0Vomei1Ie+ypbmcTCfllGKeexLjwl+IkwfMzKXfy9eURCKtst9HmrQ6/5D5g== X-Received: by 2002:a17:90b:51cb:b0:2ee:b83f:f876 with SMTP id 98e67ed59e1d1-2f452ec6d8bmr512995a91.23.1734641684949; Thu, 19 Dec 2024 12:54:44 -0800 (PST) Received: from dianders.sjc.corp.google.com ([2620:15c:9d:2:a8a3:6409:6518:340d]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2f2ed644d87sm4126905a91.27.2024.12.19.12.54.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 12:54:44 -0800 (PST) From: Douglas Anderson To: Catalin Marinas , Will Deacon , Mark Rutland Cc: Roxana Bradescu , Julius Werner , bjorn.andersson@oss.qualcomm.com, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Jeffrey Hugo , Trilok Soni , Douglas Anderson , Anshuman Khandual , Besar Wicaksono , D Scott Phillips , Easwar Hariharan , James Morse , Kent Overstreet , Oliver Upton , Suren Baghdasaryan , linux-kernel@vger.kernel.org Subject: [PATCH v3 0/3] arm64: errata: Rework Spectre BHB mitigations to not assume "safe" Date: Thu, 19 Dec 2024 12:53:20 -0800 Message-ID: <20241219205426.2275508-1-dianders@chromium.org> X-Mailer: git-send-email 2.47.1.613.gc27f4b7a9f-goog Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Recently I realized that a device with some Qualcomm Kryo 4xx cores reported in `lscpu` that it was _not_ vulnerable to Spectre BHB. This seemed unlikely to me. I wrote up a patch series to attempt (with a lot of guesswork) to add Qualcomm cores to the tables governing how the Spectre BHB mitigation worked. In response to that patch, Will suggested that I flip the mitigation on its head and assume things are vulnerable until we find that they're not [1]. This patch series _attempts_ to accomplish that. In case it's not obvious, v2 of this patch series was pretty different than v1 because it flips the logic on its head. Some of the patches carried over, though. v3 is yet more different, avoiding the guesses (and thus dropping some patches) and also incorporating feedback from Julius in response to v2. As a last caveat, I'll note that I am certainly no expert on Spectre. Mostly I ended up here running `lscpu` on a device and noticing that it thought that it wasn't affected by Spectre v2 when I thought it was. Link to prev versions: v1: https://lore.kernel.org/r/20241209174430.2904353-1-dianders@chromium.org/ v2: https://lore.kernel.org/r/20241214005248.198803-1-dianders@chromium.org [1] https://lore.kernel.org/r/20241211213410.GB17486@willie-the-truck Changes in v3: - Don't guess the mitigation; just report unknown cores as vulnerable. - Restructure the code since is_spectre_bhb_affected() defaults to true - arm64: cputype: Add MIDR_CORTEX_A76AE - arm64: errata: Add newer ARM cores to the spectre_bhb_loop_affected() lists Changes in v2: - arm64: errata: Assume that unknown CPUs _are_ vulnerable to Spectre BHB Douglas Anderson (3): arm64: errata: Assume that unknown CPUs _are_ vulnerable to Spectre BHB arm64: cputype: Add MIDR_CORTEX_A76AE arm64: errata: Add newer ARM cores to the spectre_bhb_loop_affected() lists arch/arm64/include/asm/cputype.h | 2 + arch/arm64/include/asm/spectre.h | 1 - arch/arm64/kernel/proton-pack.c | 157 ++++++++++++++++++------------- 3 files changed, 92 insertions(+), 68 deletions(-) -- 2.47.1.613.gc27f4b7a9f-goog